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annotate test/CodeGen/PowerPC/unal-altivec-wint.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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1 ; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
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2 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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3 target triple = "powerpc64-unknown-linux-gnu"
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5 declare <4 x i32> @llvm.ppc.altivec.lvx(i8*) #1
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7 define <4 x i32> @test1(<4 x i32>* %h) #0 {
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9 %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
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10 %hv = bitcast <4 x i32>* %h1 to i8*
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11 %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv)
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13 %v0 = load <4 x i32>, <4 x i32>* %h, align 8
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15 %a = add <4 x i32> %v0, %vl
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16 ret <4 x i32> %a
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18 ; CHECK-LABEL: @test1
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19 ; CHECK: li [[REG:[0-9]+]], 16
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20 ; CHECK-NOT: li {{[0-9]+}}, 15
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21 ; CHECK-DAG: lvx {{[0-9]+}}, 0, 3
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22 ; CHECK-DAG: lvx {{[0-9]+}}, 3, [[REG]]
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23 ; CHECK: blr
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24 }
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26 declare void @llvm.ppc.altivec.stvx(<4 x i32>, i8*) #0
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28 define <4 x i32> @test2(<4 x i32>* %h, <4 x i32> %d) #0 {
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30 %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
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31 %hv = bitcast <4 x i32>* %h1 to i8*
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32 call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv)
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34 %v0 = load <4 x i32>, <4 x i32>* %h, align 8
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36 ret <4 x i32> %v0
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38 ; CHECK-LABEL: @test2
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39 ; CHECK: li [[REG:[0-9]+]], 16
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40 ; CHECK-NOT: li {{[0-9]+}}, 15
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41 ; CHECK-DAG: lvx {{[0-9]+}}, 0, 3
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42 ; CHECK-DAG: lvx {{[0-9]+}}, 3, [[REG]]
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43 ; CHECK: blr
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44 }
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46 attributes #0 = { nounwind }
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47 attributes #1 = { nounwind readonly }
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