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annotate test/CodeGen/X86/legalize-sub-zero.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 95c75e76d11b
children
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95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -mtriple=i686-pc-win32
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2
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3 ;target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
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4 ;target triple = "i686-pc-win32"
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5
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6 define void @test() nounwind {
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7 %1 = fdiv <3 x double> zeroinitializer, undef
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8 %2 = fdiv <2 x double> zeroinitializer, undef
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9 %3 = shufflevector <2 x double> %2, <2 x double> undef, <3 x i32> <i32 0, i32
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10 1, i32 undef>
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11 %4 = insertelement <3 x double> %3, double undef, i32 2
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12 %5 = bitcast <3 x double> %1 to <3 x i64>
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13 %6 = bitcast <3 x double> %4 to <3 x i64>
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14 %7 = sub <3 x i64> %5, %6
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15 %8 = shufflevector <3 x i64> %7, <3 x i64> undef, <2 x i32> <i32 0, i32 1>
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16 %9 = xor <2 x i64> %8, zeroinitializer
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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17 %10 = add nsw <2 x i64> %9, zeroinitializer
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18 %11 = shufflevector <2 x i64> %10, <2 x i64> undef, <3 x i32> <i32 0, i32 1,
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19 i32 undef>
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20 %12 = insertelement <3 x i64> %11, i64 0, i32 2
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21 %13 = shufflevector <3 x i64> %12, <3 x i64> undef, <4 x i32> <i32 0, i32 1,
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22 i32 2, i32 3>
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23 %14 = shufflevector <4 x i64> %13, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
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24 %15 = bitcast <2 x i64> %14 to <4 x i32>
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25 %16 = shufflevector <4 x i32> %15, <4 x i32> undef, <4 x i32> <i32 0, i32 2,
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26 i32 0, i32 2>
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27 %17 = bitcast <4 x i32> %16 to <2 x i64>
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28 %18 = shufflevector <2 x i64> %17, <2 x i64> undef, <2 x i32> <i32 0, i32 2>
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29 %19 = bitcast <2 x i64> %18 to <4 x i32>
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30 %20 = shufflevector <4 x i32> %19, <4 x i32> undef, <3 x i32> <i32 0, i32 1,
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31 i32 2>
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32 %21 = or <3 x i32> %20, zeroinitializer
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33 store <3 x i32> %21, <3 x i32> addrspace(1)* undef, align 16
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34 ret void
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35 }