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1 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file contains the entry points for global functions defined in the x86
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11 // target library, as used by the LLVM JIT.
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12 //
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13 //===----------------------------------------------------------------------===//
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14
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15 #ifndef LLVM_LIB_TARGET_X86_X86_H
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16 #define LLVM_LIB_TARGET_X86_X86_H
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17
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18 #include "llvm/Support/CodeGen.h"
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19
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20 namespace llvm {
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21
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22 class FunctionPass;
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23 class ImmutablePass;
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24 class InstructionSelector;
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25 class PassRegistry;
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26 class X86RegisterBankInfo;
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27 class X86Subtarget;
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28 class X86TargetMachine;
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29
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30 /// This pass converts a legalized DAG into a X86-specific DAG, ready for
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31 /// instruction scheduling.
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32 FunctionPass *createX86ISelDag(X86TargetMachine &TM,
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33 CodeGenOpt::Level OptLevel);
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34
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35 /// This pass initializes a global base register for PIC on x86-32.
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36 FunctionPass *createX86GlobalBaseRegPass();
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37
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38 /// This pass combines multiple accesses to local-dynamic TLS variables so that
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39 /// the TLS base address for the module is only fetched once per execution path
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40 /// through the function.
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41 FunctionPass *createCleanupLocalDynamicTLSPass();
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42
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43 /// This function returns a pass which converts floating-point register
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44 /// references and pseudo instructions into floating-point stack references and
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45 /// physical instructions.
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46 FunctionPass *createX86FloatingPointStackifierPass();
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47
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48 /// This pass inserts AVX vzeroupper instructions before each call to avoid
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49 /// transition penalty between functions encoded with AVX and SSE.
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50 FunctionPass *createX86IssueVZeroUpperPass();
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51
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52 /// Return a pass that pads short functions with NOOPs.
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53 /// This will prevent a stall when returning on the Atom.
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54 FunctionPass *createX86PadShortFunctions();
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55
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56 /// Return a pass that selectively replaces certain instructions (like add,
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57 /// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA
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58 /// instructions, in order to eliminate execution delays in some processors.
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59 FunctionPass *createX86FixupLEAs();
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60
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61 /// Return a pass that removes redundant LEA instructions and redundant address
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62 /// recalculations.
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63 FunctionPass *createX86OptimizeLEAs();
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64
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65 /// Return a pass that transforms setcc + movzx pairs into xor + setcc.
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66 FunctionPass *createX86FixupSetCC();
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67
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68 /// Return a pass that expands WinAlloca pseudo-instructions.
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69 FunctionPass *createX86WinAllocaExpander();
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70
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71 /// Return a pass that optimizes the code-size of x86 call sequences. This is
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72 /// done by replacing esp-relative movs with pushes.
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73 FunctionPass *createX86CallFrameOptimization();
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74
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75 /// Return an IR pass that inserts EH registration stack objects and explicit
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76 /// EH state updates. This pass must run after EH preparation, which does
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77 /// Windows-specific but architecture-neutral preparation.
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78 FunctionPass *createX86WinEHStatePass();
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79
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80 /// Return a Machine IR pass that expands X86-specific pseudo
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81 /// instructions into a sequence of actual instructions. This pass
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82 /// must run after prologue/epilogue insertion and before lowering
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83 /// the MachineInstr to MC.
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84 FunctionPass *createX86ExpandPseudoPass();
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85
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86 /// This pass converts X86 cmov instructions into branch when profitable.
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87 FunctionPass *createX86CmovConverterPass();
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88
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89 /// Return a Machine IR pass that selectively replaces
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90 /// certain byte and word instructions by equivalent 32 bit instructions,
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91 /// in order to eliminate partial register usage, false dependences on
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92 /// the upper portions of registers, and to save code size.
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93 FunctionPass *createX86FixupBWInsts();
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94
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95 /// Return a Machine IR pass that reassigns instruction chains from one domain
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96 /// to another, when profitable.
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97 FunctionPass *createX86DomainReassignmentPass();
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98
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99 void initializeFixupBWInstPassPass(PassRegistry &);
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100
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101 /// This pass replaces EVEX encoded of AVX-512 instructiosn by VEX
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102 /// encoding when possible in order to reduce code size.
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103 FunctionPass *createX86EvexToVexInsts();
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104
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105 InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
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106 X86Subtarget &,
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107 X86RegisterBankInfo &);
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108
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109 void initializeEvexToVexInstPassPass(PassRegistry &);
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110
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111 } // End llvm namespace
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112
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113 #endif
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