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annotate include/llvm/CodeGen/VirtRegMap.h @ 92:8a1cd0ffee6e

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Create prototype declaration automatically if prototype was not found when parsing continuation arguments.
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Fri, 17 Apr 2015 13:54:34 +0900
parents 60c9769439b8
children 803732b1fca8
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1 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file implements a virtual register map. This maps virtual registers to
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11 // physical registers and virtual registers to stack slots. It is created and
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12 // updated by a register allocator and then used by a machine code rewriter that
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13 // adds spill code and rewrites virtual into physical register references.
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14 //
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15 //===----------------------------------------------------------------------===//
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16
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17 #ifndef LLVM_CODEGEN_VIRTREGMAP_H
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18 #define LLVM_CODEGEN_VIRTREGMAP_H
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19
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20 #include "llvm/ADT/IndexedMap.h"
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21 #include "llvm/CodeGen/MachineFunctionPass.h"
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22 #include "llvm/Target/TargetRegisterInfo.h"
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23
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24 namespace llvm {
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25 class MachineInstr;
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26 class MachineFunction;
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27 class MachineRegisterInfo;
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28 class TargetInstrInfo;
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29 class raw_ostream;
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30 class SlotIndexes;
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31
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32 class VirtRegMap : public MachineFunctionPass {
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33 public:
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34 enum {
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35 NO_PHYS_REG = 0,
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36 NO_STACK_SLOT = (1L << 30)-1,
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37 MAX_STACK_SLOT = (1L << 18)-1
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38 };
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39
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40 private:
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41 MachineRegisterInfo *MRI;
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42 const TargetInstrInfo *TII;
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43 const TargetRegisterInfo *TRI;
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44 MachineFunction *MF;
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45
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46 /// Virt2PhysMap - This is a virtual to physical register
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47 /// mapping. Each virtual register is required to have an entry in
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48 /// it; even spilled virtual registers (the register mapped to a
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49 /// spilled register is the temporary used to load it from the
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50 /// stack).
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51 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
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52
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53 /// Virt2StackSlotMap - This is virtual register to stack slot
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54 /// mapping. Each spilled virtual register has an entry in it
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55 /// which corresponds to the stack slot this register is spilled
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56 /// at.
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57 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
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58
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59 /// Virt2SplitMap - This is virtual register to splitted virtual register
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60 /// mapping.
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61 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
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62
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63 /// createSpillSlot - Allocate a spill slot for RC from MFI.
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64 unsigned createSpillSlot(const TargetRegisterClass *RC);
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65
83
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66 VirtRegMap(const VirtRegMap&) = delete;
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67 void operator=(const VirtRegMap&) = delete;
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68
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69 public:
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70 static char ID;
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71 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
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72 Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { }
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73 bool runOnMachineFunction(MachineFunction &MF) override;
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74
77
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75 void getAnalysisUsage(AnalysisUsage &AU) const override {
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76 AU.setPreservesAll();
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77 MachineFunctionPass::getAnalysisUsage(AU);
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78 }
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79
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80 MachineFunction &getMachineFunction() const {
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81 assert(MF && "getMachineFunction called before runOnMachineFunction");
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82 return *MF;
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83 }
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84
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85 MachineRegisterInfo &getRegInfo() const { return *MRI; }
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86 const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
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87
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88 void grow();
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89
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90 /// @brief returns true if the specified virtual register is
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91 /// mapped to a physical register
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92 bool hasPhys(unsigned virtReg) const {
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93 return getPhys(virtReg) != NO_PHYS_REG;
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94 }
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95
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96 /// @brief returns the physical register mapped to the specified
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97 /// virtual register
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98 unsigned getPhys(unsigned virtReg) const {
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99 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
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100 return Virt2PhysMap[virtReg];
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101 }
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102
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103 /// @brief creates a mapping for the specified virtual register to
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104 /// the specified physical register
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105 void assignVirt2Phys(unsigned virtReg, unsigned physReg) {
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106 assert(TargetRegisterInfo::isVirtualRegister(virtReg) &&
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107 TargetRegisterInfo::isPhysicalRegister(physReg));
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108 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
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109 "attempt to assign physical register to already mapped "
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110 "virtual register");
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111 Virt2PhysMap[virtReg] = physReg;
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112 }
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113
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114 /// @brief clears the specified virtual register's, physical
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115 /// register mapping
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116 void clearVirt(unsigned virtReg) {
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117 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
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118 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
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119 "attempt to clear a not assigned virtual register");
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120 Virt2PhysMap[virtReg] = NO_PHYS_REG;
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121 }
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122
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123 /// @brief clears all virtual to physical register mappings
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124 void clearAllVirt() {
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125 Virt2PhysMap.clear();
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126 grow();
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127 }
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128
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129 /// @brief returns true if VirtReg is assigned to its preferred physreg.
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130 bool hasPreferredPhys(unsigned VirtReg);
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131
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132 /// @brief returns true if VirtReg has a known preferred register.
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133 /// This returns false if VirtReg has a preference that is a virtual
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134 /// register that hasn't been assigned yet.
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135 bool hasKnownPreference(unsigned VirtReg);
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136
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137 /// @brief records virtReg is a split live interval from SReg.
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138 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
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139 Virt2SplitMap[virtReg] = SReg;
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140 }
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141
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142 /// @brief returns the live interval virtReg is split from.
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143 unsigned getPreSplitReg(unsigned virtReg) const {
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144 return Virt2SplitMap[virtReg];
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145 }
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146
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147 /// getOriginal - Return the original virtual register that VirtReg descends
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148 /// from through splitting.
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149 /// A register that was not created by splitting is its own original.
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150 /// This operation is idempotent.
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151 unsigned getOriginal(unsigned VirtReg) const {
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152 unsigned Orig = getPreSplitReg(VirtReg);
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153 return Orig ? Orig : VirtReg;
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154 }
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155
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156 /// @brief returns true if the specified virtual register is not
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157 /// mapped to a stack slot or rematerialized.
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158 bool isAssignedReg(unsigned virtReg) const {
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159 if (getStackSlot(virtReg) == NO_STACK_SLOT)
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160 return true;
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161 // Split register can be assigned a physical register as well as a
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162 // stack slot or remat id.
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163 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
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164 }
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165
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166 /// @brief returns the stack slot mapped to the specified virtual
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167 /// register
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168 int getStackSlot(unsigned virtReg) const {
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169 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
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170 return Virt2StackSlotMap[virtReg];
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171 }
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172
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173 /// @brief create a mapping for the specifed virtual register to
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174 /// the next available stack slot
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175 int assignVirt2StackSlot(unsigned virtReg);
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176 /// @brief create a mapping for the specified virtual register to
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177 /// the specified stack slot
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178 void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
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179
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180 void print(raw_ostream &OS, const Module* M = nullptr) const override;
0
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181 void dump() const;
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182 };
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183
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184 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
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185 VRM.print(OS);
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186 return OS;
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187 }
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188 } // End llvm namespace
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189
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190 #endif