annotate test/Transforms/IndVarSimplify/iv-widen-elim-ext.ll @ 123:923c9a525fb0

rename IListTest.cpp
author mir3636
date Thu, 30 Nov 2017 18:21:27 +0900
parents 1172e4bd9c6f
children c2174574ed3a
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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120
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1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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2 ; RUN: opt < %s -indvars -S | FileCheck %s
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3
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4 target datalayout = "e-m:e-i64:64-p:64:64:64-n8:16:32:64-S128"
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5
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6 ; When widening IV and its users, trunc and zext/sext are not needed
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7 ; if the original 32-bit user is known to be non-negative, whether
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8 ; the IV is considered signed or unsigned.
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9 define void @foo(i32* %A, i32* %B, i32* %C, i32 %N) {
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10 ; CHECK-LABEL: @foo(
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11 ; CHECK-NEXT: entry:
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12 ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, %N
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13 ; CHECK-NEXT: br i1 [[CMP1]], label %for.body.lr.ph, label %for.end
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14 ; CHECK: for.body.lr.ph:
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15 ; CHECK-NEXT: br label %for.body
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16 ; CHECK: for.body:
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17 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV:%.*]].next, %for.inc ], [ 0, %for.body.lr.ph ]
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18 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* %B, i64 [[INDVARS_IV]]
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19 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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20 ; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2
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21 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* %C, i64 [[TMP1]]
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22 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
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23 ; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP0]], [[TMP2]]
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24 ; CHECK-NEXT: [[TRUNC0:%.*]] = trunc i64 [[TMP1]] to i32
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25 ; CHECK-NEXT: [[DIV0:%.*]] = udiv i32 5, [[TRUNC0]]
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26 ; CHECK-NEXT: [[ADD4:%.*]] = add nsw i32 [[ADD3]], [[DIV0]]
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27 ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* %A, i64 [[INDVARS_IV]]
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28 ; CHECK-NEXT: store i32 [[ADD4]], i32* [[ARRAYIDX5]], align 4
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29 ; CHECK-NEXT: br label %for.inc
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30 ; CHECK: for.inc:
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31 ; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
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32 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 %N to i64
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33 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
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34 ; CHECK-NEXT: br i1 [[EXITCOND]], label %for.body, label %for.cond.for.end_crit_edge
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35 ; CHECK: for.cond.for.end_crit_edge:
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36 ; CHECK-NEXT: br label %for.end
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37 ; CHECK: for.end:
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38 ; CHECK-NEXT: ret void
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39 ;
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40 entry:
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41 %cmp1 = icmp slt i32 0, %N
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42 br i1 %cmp1, label %for.body.lr.ph, label %for.end
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43
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44 for.body.lr.ph: ; preds = %entry
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45 br label %for.body
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46
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47 for.body: ; preds = %for.body.lr.ph, %for.inc
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48 %i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
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49 %idxprom = sext i32 %i.02 to i64
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50 %arrayidx = getelementptr inbounds i32, i32* %B, i64 %idxprom
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51 %0 = load i32, i32* %arrayidx, align 4
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52 %add = add nsw i32 %i.02, 2
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53 %idxprom1 = zext i32 %add to i64
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54 %arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %idxprom1
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55 %1 = load i32, i32* %arrayidx2, align 4
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56 %add3 = add nsw i32 %0, %1
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57 %div0 = udiv i32 5, %add
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58 %add4 = add nsw i32 %add3, %div0
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59 %idxprom4 = zext i32 %i.02 to i64
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60 %arrayidx5 = getelementptr inbounds i32, i32* %A, i64 %idxprom4
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61 store i32 %add4, i32* %arrayidx5, align 4
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62 br label %for.inc
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63
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64 for.inc: ; preds = %for.body
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65 %inc = add nsw i32 %i.02, 1
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66 %cmp = icmp slt i32 %inc, %N
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67 br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
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68
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69 for.cond.for.end_crit_edge: ; preds = %for.inc
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70 br label %for.end
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71
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72 for.end: ; preds = %for.cond.for.end_crit_edge, %entry
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73 ret void
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74 }
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75
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76 define void @foo1(i32* %A, i32* %B, i32* %C, i32 %N) {
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77 ; CHECK-LABEL: @foo1(
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78 ; CHECK-NEXT: entry:
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79 ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, %N
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80 ; CHECK-NEXT: br i1 [[CMP1]], label %for.body.lr.ph, label %for.end
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81 ; CHECK: for.body.lr.ph:
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82 ; CHECK-NEXT: br label %for.body
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83 ; CHECK: for.body:
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84 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV:%.*]].next, %for.inc ], [ 0, %for.body.lr.ph ]
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85 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* %B, i64 [[INDVARS_IV]]
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86 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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87 ; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2
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88 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* %C, i64 [[TMP1]]
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89 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
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90 ; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP0]], [[TMP2]]
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91 ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* %A, i64 [[INDVARS_IV]]
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92 ; CHECK-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX5]], align 4
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93 ; CHECK-NEXT: br label %for.inc
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94 ; CHECK: for.inc:
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95 ; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
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96 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 %N to i64
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97 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
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98 ; CHECK-NEXT: br i1 [[EXITCOND]], label %for.body, label %for.cond.for.end_crit_edge
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99 ; CHECK: for.cond.for.end_crit_edge:
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100 ; CHECK-NEXT: br label %for.end
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101 ; CHECK: for.end:
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102 ; CHECK-NEXT: ret void
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103 ;
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104 entry:
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105 %cmp1 = icmp slt i32 0, %N
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106 br i1 %cmp1, label %for.body.lr.ph, label %for.end
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107
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108 for.body.lr.ph: ; preds = %entry
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109 br label %for.body
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110
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111 for.body: ; preds = %for.body.lr.ph, %for.inc
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112 %i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
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113 %idxprom = zext i32 %i.02 to i64
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114 %arrayidx = getelementptr inbounds i32, i32* %B, i64 %idxprom
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115 %0 = load i32, i32* %arrayidx, align 4
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116 %add = add nsw i32 %i.02, 2
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117 %idxprom1 = sext i32 %add to i64
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118 %arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %idxprom1
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119 %1 = load i32, i32* %arrayidx2, align 4
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120 %add3 = add nsw i32 %0, %1
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121 %idxprom4 = sext i32 %i.02 to i64
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122 %arrayidx5 = getelementptr inbounds i32, i32* %A, i64 %idxprom4
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123 store i32 %add3, i32* %arrayidx5, align 4
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124 br label %for.inc
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125
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126 for.inc: ; preds = %for.body
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127 %inc = add nsw i32 %i.02, 1
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128 %cmp = icmp slt i32 %inc, %N
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129 br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
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130
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131 for.cond.for.end_crit_edge: ; preds = %for.inc
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132 br label %for.end
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133
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134 for.end: ; preds = %for.cond.for.end_crit_edge, %entry
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135 ret void
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136 }
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137
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138
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139 @a = common global [100 x i32] zeroinitializer, align 16
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140 @b = common global [100 x i32] zeroinitializer, align 16
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141
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142 define i32 @foo2(i32 %M) {
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143 ; CHECK-LABEL: @foo2(
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144 ; CHECK-NEXT: entry:
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145 ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, %M
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146 ; CHECK-NEXT: br i1 [[CMP1]], label %for.body.lr.ph, label %for.end
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147 ; CHECK: for.body.lr.ph:
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148 ; CHECK-NEXT: [[TMP0:%.*]] = sext i32 %M to i64
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149 ; CHECK-NEXT: br label %for.body
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150 ; CHECK: for.body:
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151 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV:%.*]].next, %for.inc ], [ 0, %for.body.lr.ph ]
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152 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[INDVARS_IV]]
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153 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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154 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 [[INDVARS_IV]]
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155 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
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156 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
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157 ; CHECK-NEXT: [[TMP3:%.*]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
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158 ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[TMP3]]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
159 ; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX5]], align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
160 ; CHECK-NEXT: br label %for.inc
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
161 ; CHECK: for.inc:
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
162 ; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
163 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 %M to i64
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
164 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
165 ; CHECK-NEXT: br i1 [[EXITCOND]], label %for.body, label %for.cond.for.end_crit_edge
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
166 ; CHECK: for.cond.for.end_crit_edge:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
167 ; CHECK-NEXT: br label %for.end
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
168 ; CHECK: for.end:
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
169 ; CHECK-NEXT: [[CALL:%.*]] = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
170 ; CHECK-NEXT: ret i32 0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
171 ;
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
172 entry:
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
173 %cmp1 = icmp slt i32 0, %M
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
174 br i1 %cmp1, label %for.body.lr.ph, label %for.end
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
175
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
176 for.body.lr.ph: ; preds = %entry
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
177 br label %for.body
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
178
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
179 for.body: ; preds = %for.body.lr.ph, %for.inc
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
180 %i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
181 %idxprom = zext i32 %i.02 to i64
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
182 %arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
183 %0 = load i32, i32* %arrayidx, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
184 %idxprom1 = sext i32 %i.02 to i64
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
185 %arrayidx2 = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 %idxprom1
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
186 %1 = load i32, i32* %arrayidx2, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
187 %add = add nsw i32 %0, %1
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
188 %add3 = add nsw i32 %i.02, %M
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
189 %idxprom4 = sext i32 %add3 to i64
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
190 %arrayidx5 = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
191 store i32 %add, i32* %arrayidx5, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
192 br label %for.inc
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
193
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
194 for.inc: ; preds = %for.body
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
195 %inc = add nsw i32 %i.02, 1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
196 %cmp = icmp slt i32 %inc, %M
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
197 br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
198
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
199 for.cond.for.end_crit_edge: ; preds = %for.inc
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
200 br label %for.end
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
201
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
202 for.end: ; preds = %for.cond.for.end_crit_edge, %entry
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
203 %call = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
204 ret i32 0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
205 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
206
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
207 declare i32 @dummy(i32*, i32*)
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
208
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
209 ; A case where zext should not be eliminated when its operands could only be extended by sext.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
210 define i32 @foo3(i32 %M) {
1172e4bd9c6f update 4.0.0
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parents:
diff changeset
211 ; CHECK-LABEL: @foo3(
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
212 ; CHECK-NEXT: entry:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
213 ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, %M
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
214 ; CHECK-NEXT: br i1 [[CMP1]], label %for.body.lr.ph, label %for.end
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
215 ; CHECK: for.body.lr.ph:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
216 ; CHECK-NEXT: [[TMP0:%.*]] = sext i32 %M to i64
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
217 ; CHECK-NEXT: br label %for.body
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
218 ; CHECK: for.body:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
219 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV:%.*]].next, %for.inc ], [ 0, %for.body.lr.ph ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
220 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[INDVARS_IV]]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
221 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
222 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 [[INDVARS_IV]]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
223 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
224 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
225 ; CHECK-NEXT: [[TMP3:%.*]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
226 ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
227 ; CHECK-NEXT: [[IDXPROM4:%.*]] = zext i32 [[TMP4]] to i64
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
228 ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM4]]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
229 ; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX5]], align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
230 ; CHECK-NEXT: br label %for.inc
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
231 ; CHECK: for.inc:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
232 ; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
233 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 %M to i64
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
234 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
235 ; CHECK-NEXT: br i1 [[EXITCOND]], label %for.body, label %for.cond.for.end_crit_edge
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
236 ; CHECK: for.cond.for.end_crit_edge:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
237 ; CHECK-NEXT: br label %for.end
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
238 ; CHECK: for.end:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
239 ; CHECK-NEXT: [[CALL:%.*]] = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
240 ; CHECK-NEXT: ret i32 0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
241 ;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
242 entry:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
243 %cmp1 = icmp slt i32 0, %M
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
244 br i1 %cmp1, label %for.body.lr.ph, label %for.end
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
245
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
246 for.body.lr.ph: ; preds = %entry
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
247 br label %for.body
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
248
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
249 for.body: ; preds = %for.body.lr.ph, %for.inc
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
250 %i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
251 %idxprom = sext i32 %i.02 to i64
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
252 %arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
253 %0 = load i32, i32* %arrayidx, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
254 %idxprom1 = sext i32 %i.02 to i64
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
255 %arrayidx2 = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 %idxprom1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
256 %1 = load i32, i32* %arrayidx2, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
257 %add = add nsw i32 %0, %1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
258 %add3 = add nsw i32 %i.02, %M
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
259 %idxprom4 = zext i32 %add3 to i64
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
260 %arrayidx5 = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
261 store i32 %add, i32* %arrayidx5, align 4
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
262 br label %for.inc
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
263
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
264 for.inc: ; preds = %for.body
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
265 %inc = add nsw i32 %i.02, 1
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
266 %cmp = icmp slt i32 %inc, %M
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
267 br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
268
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
269 for.cond.for.end_crit_edge: ; preds = %for.inc
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
270 br label %for.end
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
271
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
272 for.end: ; preds = %for.cond.for.end_crit_edge, %entry
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
273 %call = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
274 ret i32 0
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
275 }