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annotate lib/CodeGen/LiveStackAnalysis.cpp @ 0:95c75e76d11b LLVM3.4

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LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
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children 54457678186b
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1 //===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file implements the live stack slot analysis pass. It is analogous to
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11 // live interval analysis except it's analyzing liveness of stack slots rather
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12 // than registers.
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13 //
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14 //===----------------------------------------------------------------------===//
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15
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16 #define DEBUG_TYPE "livestacks"
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17 #include "llvm/CodeGen/LiveStackAnalysis.h"
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18 #include "llvm/ADT/Statistic.h"
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19 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
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20 #include "llvm/CodeGen/Passes.h"
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21 #include "llvm/Support/Debug.h"
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22 #include "llvm/Support/raw_ostream.h"
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23 #include "llvm/Target/TargetRegisterInfo.h"
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24 #include <limits>
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25 using namespace llvm;
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26
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27 char LiveStacks::ID = 0;
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28 INITIALIZE_PASS_BEGIN(LiveStacks, "livestacks",
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29 "Live Stack Slot Analysis", false, false)
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30 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
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31 INITIALIZE_PASS_END(LiveStacks, "livestacks",
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32 "Live Stack Slot Analysis", false, false)
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33
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34 char &llvm::LiveStacksID = LiveStacks::ID;
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35
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36 void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
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37 AU.setPreservesAll();
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38 AU.addPreserved<SlotIndexes>();
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39 AU.addRequiredTransitive<SlotIndexes>();
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40 MachineFunctionPass::getAnalysisUsage(AU);
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41 }
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42
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43 void LiveStacks::releaseMemory() {
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44 // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
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45 VNInfoAllocator.Reset();
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46 S2IMap.clear();
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47 S2RCMap.clear();
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48 }
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49
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50 bool LiveStacks::runOnMachineFunction(MachineFunction &MF) {
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51 TRI = MF.getTarget().getRegisterInfo();
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52 // FIXME: No analysis is being done right now. We are relying on the
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53 // register allocators to provide the information.
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54 return false;
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55 }
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56
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57 LiveInterval &
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58 LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) {
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59 assert(Slot >= 0 && "Spill slot indice must be >= 0");
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60 SS2IntervalMap::iterator I = S2IMap.find(Slot);
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61 if (I == S2IMap.end()) {
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62 I = S2IMap.insert(I, std::make_pair(Slot,
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63 LiveInterval(TargetRegisterInfo::index2StackSlot(Slot), 0.0F)));
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64 S2RCMap.insert(std::make_pair(Slot, RC));
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65 } else {
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66 // Use the largest common subclass register class.
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67 const TargetRegisterClass *OldRC = S2RCMap[Slot];
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68 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
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69 }
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70 return I->second;
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71 }
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72
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73 /// print - Implement the dump method.
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74 void LiveStacks::print(raw_ostream &OS, const Module*) const {
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75
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76 OS << "********** INTERVALS **********\n";
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77 for (const_iterator I = begin(), E = end(); I != E; ++I) {
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78 I->second.print(OS);
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79 int Slot = I->first;
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80 const TargetRegisterClass *RC = getIntervalRegClass(Slot);
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81 if (RC)
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82 OS << " [" << RC->getName() << "]\n";
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83 else
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84 OS << " [Unknown]\n";
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85 }
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86 }