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1 //===-- LanaiAsmPrinter.cpp - Lanai LLVM assembly writer ------------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file contains a printer that converts from our internal representation
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11 // of machine-dependent LLVM code to the Lanai assembly language.
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12 //
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13 //===----------------------------------------------------------------------===//
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14
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15 #include "InstPrinter/LanaiInstPrinter.h"
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16 #include "Lanai.h"
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17 #include "LanaiInstrInfo.h"
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18 #include "LanaiMCInstLower.h"
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19 #include "LanaiTargetMachine.h"
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20 #include "llvm/CodeGen/AsmPrinter.h"
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21 #include "llvm/CodeGen/MachineConstantPool.h"
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22 #include "llvm/CodeGen/MachineFunctionPass.h"
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23 #include "llvm/CodeGen/MachineInstr.h"
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24 #include "llvm/CodeGen/MachineModuleInfo.h"
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25 #include "llvm/IR/Constants.h"
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26 #include "llvm/IR/DerivedTypes.h"
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27 #include "llvm/IR/Mangler.h"
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28 #include "llvm/IR/Module.h"
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29 #include "llvm/MC/MCAsmInfo.h"
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30 #include "llvm/MC/MCInst.h"
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31 #include "llvm/MC/MCInstBuilder.h"
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32 #include "llvm/MC/MCStreamer.h"
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33 #include "llvm/MC/MCSymbol.h"
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34 #include "llvm/Support/TargetRegistry.h"
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35 #include "llvm/Support/raw_ostream.h"
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36
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37 #define DEBUG_TYPE "asm-printer"
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38
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39 using namespace llvm;
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40
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41 namespace {
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42 class LanaiAsmPrinter : public AsmPrinter {
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43 public:
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44 explicit LanaiAsmPrinter(TargetMachine &TM,
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45 std::unique_ptr<MCStreamer> Streamer)
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46 : AsmPrinter(TM, std::move(Streamer)) {}
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47
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48 StringRef getPassName() const override { return "Lanai Assembly Printer"; }
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49
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50 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
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51 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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52 unsigned AsmVariant, const char *ExtraCode,
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53 raw_ostream &O) override;
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54 void EmitInstruction(const MachineInstr *MI) override;
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55 bool isBlockOnlyReachableByFallthrough(
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56 const MachineBasicBlock *MBB) const override;
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57
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58 private:
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59 void customEmitInstruction(const MachineInstr *MI);
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60 void emitCallInstruction(const MachineInstr *MI);
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61 };
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62 } // end of anonymous namespace
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63
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64 void LanaiAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
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65 raw_ostream &O) {
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66 const MachineOperand &MO = MI->getOperand(OpNum);
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67
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68 switch (MO.getType()) {
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69 case MachineOperand::MO_Register:
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70 O << LanaiInstPrinter::getRegisterName(MO.getReg());
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71 break;
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72
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73 case MachineOperand::MO_Immediate:
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74 O << MO.getImm();
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75 break;
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76
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77 case MachineOperand::MO_MachineBasicBlock:
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78 O << *MO.getMBB()->getSymbol();
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79 break;
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80
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81 case MachineOperand::MO_GlobalAddress:
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82 O << *getSymbol(MO.getGlobal());
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83 break;
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84
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85 case MachineOperand::MO_BlockAddress: {
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86 MCSymbol *BA = GetBlockAddressSymbol(MO.getBlockAddress());
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87 O << BA->getName();
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88 break;
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89 }
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90
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91 case MachineOperand::MO_ExternalSymbol:
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92 O << *GetExternalSymbolSymbol(MO.getSymbolName());
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93 break;
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94
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95 case MachineOperand::MO_JumpTableIndex:
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96 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_'
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97 << MO.getIndex();
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98 break;
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99
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100 case MachineOperand::MO_ConstantPoolIndex:
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101 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
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102 << MO.getIndex();
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103 return;
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104
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105 default:
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106 llvm_unreachable("<unknown operand type>");
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107 }
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108 }
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109
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110 // PrintAsmOperand - Print out an operand for an inline asm expression.
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111 bool LanaiAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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112 unsigned /*AsmVariant*/,
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113 const char *ExtraCode, raw_ostream &O) {
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114 // Does this asm operand have a single letter operand modifier?
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115 if (ExtraCode && ExtraCode[0]) {
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116 if (ExtraCode[1])
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117 return true; // Unknown modifier.
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118
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119 switch (ExtraCode[0]) {
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120 // The highest-numbered register of a pair.
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121 case 'H': {
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122 if (OpNo == 0)
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123 return true;
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124 const MachineOperand &FlagsOP = MI->getOperand(OpNo - 1);
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125 if (!FlagsOP.isImm())
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126 return true;
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127 unsigned Flags = FlagsOP.getImm();
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128 unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
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129 if (NumVals != 2)
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130 return true;
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131 unsigned RegOp = OpNo + 1;
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132 if (RegOp >= MI->getNumOperands())
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133 return true;
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134 const MachineOperand &MO = MI->getOperand(RegOp);
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135 if (!MO.isReg())
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136 return true;
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137 unsigned Reg = MO.getReg();
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138 O << LanaiInstPrinter::getRegisterName(Reg);
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139 return false;
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140 }
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141 default:
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142 return true; // Unknown modifier.
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143 }
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144 }
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145 printOperand(MI, OpNo, O);
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146 return false;
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147 }
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148
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149 //===----------------------------------------------------------------------===//
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150 void LanaiAsmPrinter::emitCallInstruction(const MachineInstr *MI) {
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151 assert((MI->getOpcode() == Lanai::CALL || MI->getOpcode() == Lanai::CALLR) &&
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152 "Unsupported call function");
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153
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154 LanaiMCInstLower MCInstLowering(OutContext, *this);
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155 MCSubtargetInfo STI = getSubtargetInfo();
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156 // Insert save rca instruction immediately before the call.
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157 // TODO: We should generate a pc-relative mov instruction here instead
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158 // of pc + 16 (should be mov .+16 %rca).
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159 OutStreamer->EmitInstruction(MCInstBuilder(Lanai::ADD_I_LO)
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160 .addReg(Lanai::RCA)
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161 .addReg(Lanai::PC)
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162 .addImm(16),
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163 STI);
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164
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165 // Push rca onto the stack.
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166 // st %rca, [--%sp]
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167 OutStreamer->EmitInstruction(MCInstBuilder(Lanai::SW_RI)
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168 .addReg(Lanai::RCA)
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169 .addReg(Lanai::SP)
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170 .addImm(-4)
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171 .addImm(LPAC::makePreOp(LPAC::ADD)),
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172 STI);
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173
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174 // Lower the call instruction.
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175 if (MI->getOpcode() == Lanai::CALL) {
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176 MCInst TmpInst;
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177 MCInstLowering.Lower(MI, TmpInst);
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178 TmpInst.setOpcode(Lanai::BT);
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179 OutStreamer->EmitInstruction(TmpInst, STI);
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180 } else {
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181 OutStreamer->EmitInstruction(MCInstBuilder(Lanai::ADD_R)
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182 .addReg(Lanai::PC)
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183 .addReg(MI->getOperand(0).getReg())
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184 .addReg(Lanai::R0)
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185 .addImm(LPCC::ICC_T),
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186 STI);
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187 }
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188 }
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189
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190 void LanaiAsmPrinter::customEmitInstruction(const MachineInstr *MI) {
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191 LanaiMCInstLower MCInstLowering(OutContext, *this);
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192 MCSubtargetInfo STI = getSubtargetInfo();
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193 MCInst TmpInst;
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194 MCInstLowering.Lower(MI, TmpInst);
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195 OutStreamer->EmitInstruction(TmpInst, STI);
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196 }
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197
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198 void LanaiAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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199 MachineBasicBlock::const_instr_iterator I = MI->getIterator();
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200 MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
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201
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202 do {
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203 if (I->isCall()) {
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204 emitCallInstruction(&*I);
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205 continue;
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206 }
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207
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208 customEmitInstruction(&*I);
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209 } while ((++I != E) && I->isInsideBundle());
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210 }
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211
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212 // isBlockOnlyReachableByFallthough - Return true if the basic block has
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213 // exactly one predecessor and the control transfer mechanism between
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214 // the predecessor and this block is a fall-through.
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215 // FIXME: could the overridden cases be handled in AnalyzeBranch?
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216 bool LanaiAsmPrinter::isBlockOnlyReachableByFallthrough(
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217 const MachineBasicBlock *MBB) const {
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218 // The predecessor has to be immediately before this block.
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219 const MachineBasicBlock *Pred = *MBB->pred_begin();
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220
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221 // If the predecessor is a switch statement, assume a jump table
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222 // implementation, so it is not a fall through.
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223 if (const BasicBlock *B = Pred->getBasicBlock())
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224 if (isa<SwitchInst>(B->getTerminator()))
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225 return false;
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226
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227 // Check default implementation
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228 if (!AsmPrinter::isBlockOnlyReachableByFallthrough(MBB))
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229 return false;
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230
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231 // Otherwise, check the last instruction.
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232 // Check if the last terminator is an unconditional branch.
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233 MachineBasicBlock::const_iterator I = Pred->end();
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234 while (I != Pred->begin() && !(--I)->isTerminator()) {
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235 }
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236
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237 return !I->isBarrier();
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238 }
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239
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240 // Force static initialization.
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241 extern "C" void LLVMInitializeLanaiAsmPrinter() {
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242 RegisterAsmPrinter<LanaiAsmPrinter> X(getTheLanaiTarget());
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243 }
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