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150
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1
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2 .. _gmir-opcodes:
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3
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4 Generic Opcodes
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5 ===============
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6
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7 .. contents::
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8 :local:
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9
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10 .. note::
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11
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12 This documentation does not yet fully account for vectors. Many of the
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13 scalar/integer/floating-point operations can also take vectors.
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14
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15 Constants
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16 ---------
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17
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18 G_IMPLICIT_DEF
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19 ^^^^^^^^^^^^^^
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20
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21 An undefined value.
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22
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23 .. code-block:: none
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24
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25 %0:_(s32) = G_IMPLICIT_DEF
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26
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27 G_CONSTANT
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28 ^^^^^^^^^^
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29
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30 An integer constant.
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31
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32 .. code-block:: none
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33
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34 %0:_(s32) = G_CONSTANT i32 1
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35
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36 G_FCONSTANT
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37 ^^^^^^^^^^^
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38
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39 A floating point constant.
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40
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41 .. code-block:: none
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42
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43 %0:_(s32) = G_FCONSTANT float 1.0
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44
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45 G_FRAME_INDEX
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46 ^^^^^^^^^^^^^
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47
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48 The address of an object in the stack frame.
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49
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50 .. code-block:: none
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51
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52 %1:_(p0) = G_FRAME_INDEX %stack.0.ptr0
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53
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54 G_GLOBAL_VALUE
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55 ^^^^^^^^^^^^^^
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56
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57 The address of a global value.
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58
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59 .. code-block:: none
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60
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61 %0(p0) = G_GLOBAL_VALUE @var_local
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62
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63 G_BLOCK_ADDR
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64 ^^^^^^^^^^^^
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65
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66 The address of a basic block.
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67
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68 .. code-block:: none
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69
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70 %0:_(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
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71
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72 Integer Extension and Truncation
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73 --------------------------------
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74
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75 G_ANYEXT
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76 ^^^^^^^^
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77
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78 Extend the underlying scalar type of an operation, leaving the high bits
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79 unspecified.
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80
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81 .. code-block:: none
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82
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83 %1:_(s32) = G_ANYEXT %0:_(s16)
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84
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85 G_SEXT
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86 ^^^^^^
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87
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88 Sign extend the underlying scalar type of an operation, copying the sign bit
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89 into the newly-created space.
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90
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91 .. code-block:: none
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92
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93 %1:_(s32) = G_SEXT %0:_(s16)
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94
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95 G_SEXT_INREG
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96 ^^^^^^^^^^^^
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97
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98 Sign extend the value from an arbitrary bit position, copying the sign bit
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99 into all bits above it. This is equivalent to a shl + ashr pair with an
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100 appropriate shift amount. $sz is an immediate (MachineOperand::isImm()
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101 returns true) to allow targets to have some bitwidths legal and others
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102 lowered. This opcode is particularly useful if the target has sign-extension
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103 instructions that are cheaper than the constituent shifts as the optimizer is
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104 able to make decisions on whether it's better to hang on to the G_SEXT_INREG
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105 or to lower it and optimize the individual shifts.
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106
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107 .. code-block:: none
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108
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109 %1:_(s32) = G_SEXT_INREG %0:_(s32), 16
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110
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111 G_ZEXT
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112 ^^^^^^
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113
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114 Zero extend the underlying scalar type of an operation, putting zero bits
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115 into the newly-created space.
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116
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117 .. code-block:: none
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118
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119 %1:_(s32) = G_ZEXT %0:_(s16)
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120
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121 G_TRUNC
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122 ^^^^^^^
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123
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124 Truncate the underlying scalar type of an operation. This is equivalent to
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125 G_EXTRACT for scalar types, but acts elementwise on vectors.
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126
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127 .. code-block:: none
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128
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129 %1:_(s16) = G_TRUNC %0:_(s32)
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130
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131 Type Conversions
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132 ----------------
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133
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134 G_INTTOPTR
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135 ^^^^^^^^^^
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136
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137 Convert an integer to a pointer.
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138
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139 .. code-block:: none
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140
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141 %1:_(p0) = G_INTTOPTR %0:_(s32)
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142
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143 G_PTRTOINT
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144 ^^^^^^^^^^
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145
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146 Convert a pointer to an integer.
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147
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148 .. code-block:: none
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149
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150 %1:_(s32) = G_PTRTOINT %0:_(p0)
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151
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152 G_BITCAST
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153 ^^^^^^^^^
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154
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155 Reinterpret a value as a new type. This is usually done without changing any
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156 bits but this is not always the case due a sublety in the definition of the
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157 :ref:`LLVM-IR Bitcast Instruction <i_bitcast>`.
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158
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159 .. code-block:: none
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160
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161 %1:_(s64) = G_BITCAST %0:_(<2 x s32>)
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162
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163 G_ADDRSPACE_CAST
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164 ^^^^^^^^^^^^^^^^
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165
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166 Convert a pointer to an address space to a pointer to another address space.
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167
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168 .. code-block:: none
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169
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170 %1:_(p1) = G_ADDRSPACE_CAST %0:_(p0)
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171
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172 .. caution::
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173
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174 :ref:`i_addrspacecast` doesn't mention what happens if the cast is simply
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175 invalid (i.e. if the address spaces are disjoint).
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176
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177 Scalar Operations
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178 -----------------
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179
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180 G_EXTRACT
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181 ^^^^^^^^^
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182
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183 Extract a register of the specified size, starting from the block given by
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184 index. This will almost certainly be mapped to sub-register COPYs after
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185 register banks have been selected.
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186
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187 G_INSERT
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188 ^^^^^^^^
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189
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190 Insert a smaller register into a larger one at the specified bit-index.
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191
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192 G_MERGE_VALUES
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193 ^^^^^^^^^^^^^^
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194
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195 Concatenate multiple registers of the same size into a wider register.
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196 The input operands are always ordered from lowest bits to highest:
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197
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198 .. code-block:: none
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199
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200 %0:(s32) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8),
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201 %bits_16_23:(s8), %bits_24_31:(s8)
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202
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203 G_UNMERGE_VALUES
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204 ^^^^^^^^^^^^^^^^
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205
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206 Extract multiple registers of the specified size, starting from blocks given by
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207 indexes. This will almost certainly be mapped to sub-register COPYs after
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208 register banks have been selected.
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209 The output operands are always ordered from lowest bits to highest:
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210
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211 .. code-block:: none
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212
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213 %bits_0_7:(s8), %bits_8_15:(s8),
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214 %bits_16_23:(s8), %bits_24_31:(s8) = G_UNMERGE_VALUES %0:(s32)
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215
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216 G_BSWAP
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217 ^^^^^^^
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218
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219 Reverse the order of the bytes in a scalar.
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220
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221 .. code-block:: none
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222
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223 %1:_(s32) = G_BSWAP %0:_(s32)
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224
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225 G_BITREVERSE
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226 ^^^^^^^^^^^^
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227
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228 Reverse the order of the bits in a scalar.
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229
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230 .. code-block:: none
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231
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232 %1:_(s32) = G_BITREVERSE %0:_(s32)
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233
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234 Integer Operations
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235 -------------------
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236
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237 G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR, G_SDIV, G_UDIV, G_SREM, G_UREM
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238 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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239
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240 These each perform their respective integer arithmetic on a scalar.
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241
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242 .. code-block:: none
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243
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244 %2:_(s32) = G_ADD %0:_(s32), %1:_(s32)
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245
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173
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246 G_SADDSAT, G_UADDSAT, G_SSUBSAT, G_USUBSAT
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247 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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248
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249 Signed and unsigned addition and subtraction with saturation.
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250
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251 .. code-block:: none
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252
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253 %2:_(s32) = G_SADDSAT %0:_(s32), %1:_(s32)
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254
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150
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255 G_SHL, G_LSHR, G_ASHR
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256 ^^^^^^^^^^^^^^^^^^^^^
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257
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258 Shift the bits of a scalar left or right inserting zeros (sign-bit for G_ASHR).
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259
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260 G_ICMP
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261 ^^^^^^
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262
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263 Perform integer comparison producing non-zero (true) or zero (false). It's
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264 target specific whether a true value is 1, ~0U, or some other non-zero value.
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265
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266 G_SELECT
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267 ^^^^^^^^
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268
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269 Select between two values depending on a zero/non-zero value.
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270
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271 .. code-block:: none
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272
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273 %5:_(s32) = G_SELECT %4(s1), %6, %2
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274
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275 G_PTR_ADD
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276 ^^^^^^^^^
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277
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278 Add a scalar offset in addressible units to a pointer. Addressible units are
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279 typically bytes but this may vary between targets.
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280
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281 .. code-block:: none
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282
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283 %1:_(p0) = G_PTR_ADD %0:_(p0), %1:_(s32)
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284
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285 .. caution::
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286
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287 There are currently no in-tree targets that use this with addressable units
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288 not equal to 8 bit.
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289
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290 G_PTR_MASK
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291 ^^^^^^^^^^
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292
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293 Zero the least significant N bits of a pointer.
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294
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295 .. code-block:: none
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296
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297 %1:_(p0) = G_PTR_MASK %0, 3
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298
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299 G_SMIN, G_SMAX, G_UMIN, G_UMAX
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300 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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301
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302 Take the minimum/maximum of two values.
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303
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304 .. code-block:: none
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305
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306 %5:_(s32) = G_SMIN %6, %2
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307
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308 G_UADDO, G_SADDO, G_USUBO, G_SSUBO, G_SMULO, G_UMULO
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309 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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310
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311 Perform the requested arithmetic and produce a carry output in addition to the
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312 normal result.
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313
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314 .. code-block:: none
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315
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316 %3:_(s32), %4:_(s1) = G_UADDO %0, %1
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317
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318 G_UADDE, G_SADDE, G_USUBE, G_SSUBE
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319 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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320
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321 Perform the requested arithmetic and consume a carry input in addition to the
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322 normal input. Also produce a carry output in addition to the normal result.
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323
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324 .. code-block:: none
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325
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326 %4:_(s32), %5:_(s1) = G_UADDE %0, %1, %3:_(s1)
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327
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328 G_UMULH, G_SMULH
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329 ^^^^^^^^^^^^^^^^
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330
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331 Multiply two numbers at twice the incoming bit width (signed) and return
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332 the high half of the result.
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333
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334 .. code-block:: none
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335
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336 %3:_(s32) = G_UMULH %0, %1
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337
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338 G_CTLZ, G_CTTZ, G_CTPOP
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339 ^^^^^^^^^^^^^^^^^^^^^^^
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340
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341 Count leading zeros, trailing zeros, or number of set bits.
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342
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343 .. code-block:: none
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344
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345 %2:_(s33) = G_CTLZ_ZERO_UNDEF %1
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346 %2:_(s33) = G_CTTZ_ZERO_UNDEF %1
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347 %2:_(s33) = G_CTPOP %1
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348
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349 G_CTLZ_ZERO_UNDEF, G_CTTZ_ZERO_UNDEF
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350 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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351
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352 Count leading zeros or trailing zeros. If the value is zero then the result is
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353 undefined.
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354
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355 .. code-block:: none
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356
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357 %2:_(s33) = G_CTLZ_ZERO_UNDEF %1
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358 %2:_(s33) = G_CTTZ_ZERO_UNDEF %1
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359
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360 Floating Point Operations
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361 -------------------------
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362
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363 G_FCMP
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364 ^^^^^^
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365
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366 Perform floating point comparison producing non-zero (true) or zero
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367 (false). It's target specific whether a true value is 1, ~0U, or some other
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368 non-zero value.
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369
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370 G_FNEG
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371 ^^^^^^
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372
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373 Floating point negation.
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374
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375 G_FPEXT
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376 ^^^^^^^
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377
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378 Convert a floating point value to a larger type.
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379
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380 G_FPTRUNC
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381 ^^^^^^^^^
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382
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383 Convert a floating point value to a narrower type.
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384
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385 G_FPTOSI, G_FPTOUI, G_SITOFP, G_UITOFP
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386 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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387
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388 Convert between integer and floating point.
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389
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390 G_FABS
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391 ^^^^^^
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392
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393 Take the absolute value of a floating point value.
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394
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395 G_FCOPYSIGN
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396 ^^^^^^^^^^^
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397
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398 Copy the value of the first operand, replacing the sign bit with that of the
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399 second operand.
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400
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401 G_FCANONICALIZE
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402 ^^^^^^^^^^^^^^^
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403
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404 See :ref:`i_intr_llvm_canonicalize`.
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405
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406 G_FMINNUM
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407 ^^^^^^^^^
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408
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409 Perform floating-point minimum on two values.
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410
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411 In the case where a single input is a NaN (either signaling or quiet),
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412 the non-NaN input is returned.
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413
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414 The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0.
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415
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416 G_FMAXNUM
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417 ^^^^^^^^^
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418
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419 Perform floating-point maximum on two values.
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420
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421 In the case where a single input is a NaN (either signaling or quiet),
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422 the non-NaN input is returned.
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423
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424 The return value of (FMAXNUM 0.0, -0.0) could be either 0.0 or -0.0.
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425
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426 G_FMINNUM_IEEE
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427 ^^^^^^^^^^^^^^
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428
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429 Perform floating-point minimum on two values, following the IEEE-754 2008
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430 definition. This differs from FMINNUM in the handling of signaling NaNs. If one
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431 input is a signaling NaN, returns a quiet NaN.
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432
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433 G_FMAXNUM_IEEE
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434 ^^^^^^^^^^^^^^
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435
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436 Perform floating-point maximum on two values, following the IEEE-754 2008
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437 definition. This differs from FMAXNUM in the handling of signaling NaNs. If one
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438 input is a signaling NaN, returns a quiet NaN.
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439
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440 G_FMINIMUM
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441 ^^^^^^^^^^
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442
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443 NaN-propagating minimum that also treat -0.0 as less than 0.0. While
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444 FMINNUM_IEEE follow IEEE 754-2008 semantics, FMINIMUM follows IEEE 754-2018
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445 draft semantics.
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446
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447 G_FMAXIMUM
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448 ^^^^^^^^^^
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449
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450 NaN-propagating maximum that also treat -0.0 as less than 0.0. While
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451 FMAXNUM_IEEE follow IEEE 754-2008 semantics, FMAXIMUM follows IEEE 754-2018
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452 draft semantics.
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453
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454 G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FREM
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455 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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456
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457 Perform the specified floating point arithmetic.
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458
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459 G_FMA
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460 ^^^^^
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461
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462 Perform a fused multiply add (i.e. without the intermediate rounding step).
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463
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464 G_FMAD
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465 ^^^^^^
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466
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467 Perform a non-fused multiply add (i.e. with the intermediate rounding step).
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468
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469 G_FPOW
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470 ^^^^^^
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471
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472 Raise the first operand to the power of the second.
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473
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474 G_FEXP, G_FEXP2
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475 ^^^^^^^^^^^^^^^
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476
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477 Calculate the base-e or base-2 exponential of a value
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478
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479 G_FLOG, G_FLOG2, G_FLOG10
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480 ^^^^^^^^^^^^^^^^^^^^^^^^^
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481
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482 Calculate the base-e, base-2, or base-10 respectively.
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483
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484 G_FCEIL, G_FCOS, G_FSIN, G_FSQRT, G_FFLOOR, G_FRINT, G_FNEARBYINT
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485 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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486
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487 These correspond to the standard C functions of the same name.
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488
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489 G_INTRINSIC_TRUNC
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490 ^^^^^^^^^^^^^^^^^
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491
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492 Returns the operand rounded to the nearest integer not larger in magnitude than the operand.
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493
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494 G_INTRINSIC_ROUND
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495 ^^^^^^^^^^^^^^^^^
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496
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497 Returns the operand rounded to the nearest integer.
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498
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499 Vector Specific Operations
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500 --------------------------
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501
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502 G_CONCAT_VECTORS
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503 ^^^^^^^^^^^^^^^^
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504
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505 Concatenate two vectors to form a longer vector.
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506
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507 G_BUILD_VECTOR, G_BUILD_VECTOR_TRUNC
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508 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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509
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510 Create a vector from multiple scalar registers. No implicit
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511 conversion is performed (i.e. the result element type must be the
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512 same as all source operands)
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513
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514 The _TRUNC version truncates the larger operand types to fit the
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515 destination vector elt type.
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516
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517 G_INSERT_VECTOR_ELT
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518 ^^^^^^^^^^^^^^^^^^^
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519
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520 Insert an element into a vector
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521
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522 G_EXTRACT_VECTOR_ELT
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523 ^^^^^^^^^^^^^^^^^^^^
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524
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525 Extract an element from a vector
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526
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527 G_SHUFFLE_VECTOR
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528 ^^^^^^^^^^^^^^^^
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529
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530 Concatenate two vectors and shuffle the elements according to the mask operand.
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531 The mask operand should be an IR Constant which exactly matches the
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532 corresponding mask for the IR shufflevector instruction.
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533
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534 Memory Operations
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535 -----------------
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536
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537 G_LOAD, G_SEXTLOAD, G_ZEXTLOAD
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538 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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539
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540 Generic load. Expects a MachineMemOperand in addition to explicit
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541 operands. If the result size is larger than the memory size, the
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542 high bits are undefined, sign-extended, or zero-extended respectively.
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543
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544 Only G_LOAD is valid if the result is a vector type. If the result is larger
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545 than the memory size, the high elements are undefined (i.e. this is not a
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546 per-element, vector anyextload)
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547
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548 G_INDEXED_LOAD
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549 ^^^^^^^^^^^^^^
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550
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551 Generic indexed load. Combines a GEP with a load. $newaddr is set to $base + $offset.
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552 If $am is 0 (post-indexed), then the value is loaded from $base; if $am is 1 (pre-indexed)
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553 then the value is loaded from $newaddr.
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554
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555 G_INDEXED_SEXTLOAD
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556 ^^^^^^^^^^^^^^^^^^
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557
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558 Same as G_INDEXED_LOAD except that the load performed is sign-extending, as with G_SEXTLOAD.
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559
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560 G_INDEXED_ZEXTLOAD
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561 ^^^^^^^^^^^^^^^^^^
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562
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563 Same as G_INDEXED_LOAD except that the load performed is zero-extending, as with G_ZEXTLOAD.
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564
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565 G_STORE
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566 ^^^^^^^
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567
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568 Generic store. Expects a MachineMemOperand in addition to explicit operands.
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569
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570 G_INDEXED_STORE
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571 ^^^^^^^^^^^^^^^
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572
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573 Combines a store with a GEP. See description of G_INDEXED_LOAD for indexing behaviour.
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574
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575 G_ATOMIC_CMPXCHG_WITH_SUCCESS
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576 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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577
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578 Generic atomic cmpxchg with internal success check. Expects a
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579 MachineMemOperand in addition to explicit operands.
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580
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581 G_ATOMIC_CMPXCHG
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582 ^^^^^^^^^^^^^^^^
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583
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584 Generic atomic cmpxchg. Expects a MachineMemOperand in addition to explicit
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585 operands.
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586
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|
587 G_ATOMICRMW_XCHG, G_ATOMICRMW_ADD, G_ATOMICRMW_SUB, G_ATOMICRMW_AND, G_ATOMICRMW_NAND, G_ATOMICRMW_OR, G_ATOMICRMW_XOR, G_ATOMICRMW_MAX, G_ATOMICRMW_MIN, G_ATOMICRMW_UMAX, G_ATOMICRMW_UMIN, G_ATOMICRMW_FADD, G_ATOMICRMW_FSUB
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588 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
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|
589
|
|
|
590 Generic atomicrmw. Expects a MachineMemOperand in addition to explicit
|
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591 operands.
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592
|
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|
593 G_FENCE
|
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|
594 ^^^^^^^
|
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595
|
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|
596 .. caution::
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597
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|
|
598 I couldn't find any documentation on this at the time of writing.
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599
|
|
|
600 Control Flow
|
|
|
601 ------------
|
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|
602
|
|
|
603 G_PHI
|
|
|
604 ^^^^^
|
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|
605
|
|
|
606 Implement the φ node in the SSA graph representing the function.
|
|
|
607
|
|
|
608 .. code-block:: none
|
|
|
609
|
|
|
610 %1(s8) = G_PHI %7(s8), %bb.0, %3(s8), %bb.1
|
|
|
611
|
|
|
612 G_BR
|
|
|
613 ^^^^
|
|
|
614
|
|
|
615 Unconditional branch
|
|
|
616
|
|
|
617 G_BRCOND
|
|
|
618 ^^^^^^^^
|
|
|
619
|
|
|
620 Conditional branch
|
|
|
621
|
|
|
622 G_BRINDIRECT
|
|
|
623 ^^^^^^^^^^^^
|
|
|
624
|
|
|
625 Indirect branch
|
|
|
626
|
|
|
627 G_BRJT
|
|
|
628 ^^^^^^
|
|
|
629
|
|
|
630 Indirect branch to jump table entry
|
|
|
631
|
|
|
632 G_JUMP_TABLE
|
|
|
633 ^^^^^^^^^^^^
|
|
|
634
|
|
|
635 .. caution::
|
|
|
636
|
|
|
637 I found no documentation for this instruction at the time of writing.
|
|
|
638
|
|
|
639 G_INTRINSIC, G_INTRINSIC_W_SIDE_EFFECTS
|
|
|
640 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
|
641
|
|
|
642 Call an intrinsic
|
|
|
643
|
|
|
644 The _W_SIDE_EFFECTS version is considered to have unknown side-effects and
|
|
|
645 as such cannot be reordered across other side-effecting instructions.
|
|
|
646
|
|
|
647 .. note::
|
|
|
648
|
|
|
649 Unlike SelectionDAG, there is no _VOID variant. Both of these are permitted
|
|
|
650 to have zero, one, or multiple results.
|
|
|
651
|
|
|
652 Variadic Arguments
|
|
|
653 ------------------
|
|
|
654
|
|
|
655 G_VASTART
|
|
|
656 ^^^^^^^^^
|
|
|
657
|
|
|
658 .. caution::
|
|
|
659
|
|
|
660 I found no documentation for this instruction at the time of writing.
|
|
|
661
|
|
|
662 G_VAARG
|
|
|
663 ^^^^^^^
|
|
|
664
|
|
|
665 .. caution::
|
|
|
666
|
|
|
667 I found no documentation for this instruction at the time of writing.
|
|
|
668
|
|
|
669 Other Operations
|
|
|
670 ----------------
|
|
|
671
|
|
|
672 G_DYN_STACKALLOC
|
|
|
673 ^^^^^^^^^^^^^^^^
|
|
|
674
|
|
173
|
675 Dynamically realigns the stack pointer to the specified size and alignment.
|
|
|
676 An alignment value of `0` or `1` mean no specific alignment.
|
|
150
|
677
|
|
|
678 .. code-block:: none
|
|
|
679
|
|
|
680 %8:_(p0) = G_DYN_STACKALLOC %7(s64), 32
|
