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annotate test/CodeGen/AMDGPU/llvm.SI.tbuffer.store.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents test/CodeGen/R600/llvm.SI.tbuffer.store.ll@60c9769439b8
children 1172e4bd9c6f
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60c9769439b8 LLVM 3.7
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1 ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
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2 ;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
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4 ;CHECK-LABEL: {{^}}test1:
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5 ;CHECK: tbuffer_store_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, 0x20, -1, 0, -1, 0, 14, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0
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6 define void @test1(i32 %a1, i32 %vaddr) #0 {
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7 %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0
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8 call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata,
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9 i32 4, i32 %vaddr, i32 0, i32 32, i32 14, i32 4, i32 1, i32 0, i32 1,
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10 i32 1, i32 0)
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11 ret void
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12 }
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14 ;CHECK-LABEL: {{^}}test2:
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15 ;CHECK: tbuffer_store_format_xyz {{v\[[0-9]+:[0-9]+\]}}, 0x18, -1, 0, -1, 0, 13, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0
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16 define void @test2(i32 %a1, i32 %vaddr) #0 {
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17 %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0
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18 call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata,
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19 i32 3, i32 %vaddr, i32 0, i32 24, i32 13, i32 4, i32 1, i32 0, i32 1,
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20 i32 1, i32 0)
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21 ret void
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22 }
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24 ;CHECK-LABEL: {{^}}test3:
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25 ;CHECK: tbuffer_store_format_xy {{v\[[0-9]+:[0-9]+\]}}, 0x10, -1, 0, -1, 0, 11, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0
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26 define void @test3(i32 %a1, i32 %vaddr) #0 {
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27 %vdata = insertelement <2 x i32> undef, i32 %a1, i32 0
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28 call void @llvm.SI.tbuffer.store.v2i32(<16 x i8> undef, <2 x i32> %vdata,
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29 i32 2, i32 %vaddr, i32 0, i32 16, i32 11, i32 4, i32 1, i32 0, i32 1,
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30 i32 1, i32 0)
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31 ret void
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32 }
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34 ;CHECK-LABEL: {{^}}test4:
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35 ;CHECK: tbuffer_store_format_x {{v[0-9]+}}, 0x8, -1, 0, -1, 0, 4, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0
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36 define void @test4(i32 %vdata, i32 %vaddr) #0 {
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37 call void @llvm.SI.tbuffer.store.i32(<16 x i8> undef, i32 %vdata,
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38 i32 1, i32 %vaddr, i32 0, i32 8, i32 4, i32 4, i32 1, i32 0, i32 1,
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39 i32 1, i32 0)
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40 ret void
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41 }
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43 declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
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44 declare void @llvm.SI.tbuffer.store.v2i32(<16 x i8>, <2 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
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45 declare void @llvm.SI.tbuffer.store.v4i32(<16 x i8>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
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54457678186b LLVM 3.6
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47 attributes #0 = { "ShaderType"="1" }