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annotate test/CodeGen/X86/2011-12-08-AVXISelBugs.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children 803732b1fca8
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1 ; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx -mattr=+avx
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2 ; Various missing patterns causing crashes.
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3 ; rdar://10538793
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4
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5 define void @t1() nounwind {
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6 entry:
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7 br label %loop.cond
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8
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9 loop.cond: ; preds = %t1.exit, %entry
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10 br i1 false, label %return, label %loop
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11
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12 loop: ; preds = %loop.cond
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13 br i1 undef, label %0, label %t1.exit
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14
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15 ; <label>:0 ; preds = %loop
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16 %1 = load <16 x i32>, <16 x i32> addrspace(1)* undef, align 64
0
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17 %2 = shufflevector <16 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, <16 x i32> %1, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 0, i32 0>
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18 store <16 x i32> %2, <16 x i32> addrspace(1)* undef, align 64
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19 br label %t1.exit
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20
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21 t1.exit: ; preds = %0, %loop
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22 br label %loop.cond
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23
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24 return: ; preds = %loop.cond
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25 ret void
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26 }
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27
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28 define void @t2() nounwind {
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29 br i1 undef, label %1, label %4
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30
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31 ; <label>:1 ; preds = %0
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32 %2 = load <16 x i32>, <16 x i32> addrspace(1)* undef, align 64
0
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33 %3 = shufflevector <16 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, <16 x i32> %2, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 20, i32 0, i32 0, i32 0, i32 0>
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34 store <16 x i32> %3, <16 x i32> addrspace(1)* undef, align 64
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35 br label %4
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36
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37 ; <label>:4 ; preds = %1, %0
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38 ret void
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39 }
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40
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41 define void @t3() nounwind {
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42 entry:
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43 br label %loop.cond
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44
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45 loop.cond: ; preds = %t2.exit, %entry
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46 br i1 false, label %return, label %loop
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47
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48 loop: ; preds = %loop.cond
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49 br i1 undef, label %0, label %t2.exit
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50
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51 ; <label>:0 ; preds = %loop
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52 %1 = shufflevector <16 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, <16 x i32> undef, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 0>
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53 %2 = load <16 x i32>, <16 x i32> addrspace(1)* undef, align 64
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54 %3 = shufflevector <16 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, <16 x i32> %2, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 28, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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55 store <16 x i32> %3, <16 x i32> addrspace(1)* undef, align 64
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56 br label %t2.exit
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57
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58 t2.exit: ; preds = %0, %loop
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59 br label %loop.cond
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60
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61 return: ; preds = %loop.cond
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62 ret void
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63 }
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64
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65 define <3 x i64> @t4() nounwind {
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66 entry:
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67 %0 = load <2 x i64>, <2 x i64> addrspace(1)* undef, align 16
0
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68 %1 = extractelement <2 x i64> %0, i32 0
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69 %2 = insertelement <3 x i64> <i64 undef, i64 0, i64 0>, i64 %1, i32 0
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70 ret <3 x i64> %2
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71 }
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72
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73 define void @t5() nounwind {
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74 entry:
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75 %0 = shufflevector <2 x i64> zeroinitializer, <2 x i64> undef, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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76 %1 = shufflevector <8 x i64> <i64 0, i64 0, i64 0, i64 undef, i64 undef, i64 0, i64 0, i64 0>, <8 x i64> %0, <8 x i32> <i32 0, i32 1, i32 2, i32 9, i32 8, i32 5, i32 6, i32 7>
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77 store <8 x i64> %1, <8 x i64> addrspace(1)* undef, align 64
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78
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79 ret void
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80 }