annotate test/CodeGen/X86/commute-two-addr.ll @ 95:afa8332a0e37 LLVM3.8

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children
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95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; The register allocator can commute two-address instructions to avoid
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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2 ; insertion of register-register copies.
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3
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4 ; Make sure there are only 3 mov's for each testcase
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5 ; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefix=LINUX
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6 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s -check-prefix=DARWIN
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7
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8
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9 @G = external global i32 ; <i32*> [#uses=2]
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10
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11 declare void @ext(i32)
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12
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13 define i32 @t1(i32 %X, i32 %Y) nounwind {
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14 ; LINUX-LABEL: t1:
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15 ; LINUX: movl 4(%esp), %eax
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16 ; LINUX: movl 8(%esp), %ecx
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17 ; LINUX: addl %eax, %ecx
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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18 ; LINUX: movl %ecx, G
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19 %Z = add i32 %X, %Y ; <i32> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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20 store i32 %Z, i32* @G
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21 ret i32 %X
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22 }
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23
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24 define i32 @t2(i32 %X, i32 %Y) nounwind {
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25 ; LINUX-LABEL: t2:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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26 ; LINUX: movl 4(%esp), %eax
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27 ; LINUX: movl 8(%esp), %ecx
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28 ; LINUX: xorl %eax, %ecx
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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29 ; LINUX: movl %ecx, G
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30 %Z = xor i32 %X, %Y ; <i32> [#uses=1]
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31 store i32 %Z, i32* @G
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32 ret i32 %X
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33 }
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34
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35 ; rdar://8762995
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36 %0 = type { i64, i32 }
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37
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38 define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind {
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39 entry:
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40 ; DARWIN-LABEL: t3:
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41 ; DARWIN: shlq $32, %rcx
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42 ; DARWIN-NEXT: orq %rcx, %rax
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43 ; DARWIN-NEXT: shll $8
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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44 ; DARWIN-NOT: leaq
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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45 %tmp21 = zext i32 %lb to i64
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46 %tmp23 = zext i32 %ub to i64
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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47 %tmp24 = shl i64 %tmp23, 32
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48 %ins26 = or i64 %tmp24, %tmp21
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49 %tmp28 = zext i8 %has_lb to i32
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50 %tmp33 = zext i8 %has_ub to i32
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51 %tmp34 = shl i32 %tmp33, 8
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52 %tmp38 = zext i8 %lb_inclusive to i32
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53 %tmp39 = shl i32 %tmp38, 16
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54 %tmp43 = zext i8 %ub_inclusive to i32
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55 %tmp44 = shl i32 %tmp43, 24
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56 %ins31 = or i32 %tmp39, %tmp28
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57 %ins36 = or i32 %ins31, %tmp34
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58 %ins46 = or i32 %ins36, %tmp44
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59 %tmp16 = insertvalue %0 undef, i64 %ins26, 0
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60 %tmp19 = insertvalue %0 %tmp16, i32 %ins46, 1
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61 ret %0 %tmp19
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62 }