annotate tools/clang/docs/ControlFlowIntegrityDesign.rst @ 95:afa8332a0e37 LLVM3.8

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
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children 7d135dc70f03
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1 ===========================================
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2 Control Flow Integrity Design Documentation
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3 ===========================================
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4
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5 This page documents the design of the :doc:`ControlFlowIntegrity` schemes
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6 supported by Clang.
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7
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8 Forward-Edge CFI for Virtual Calls
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9 ==================================
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10
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11 This scheme works by allocating, for each static type used to make a virtual
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12 call, a region of read-only storage in the object file holding a bit vector
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13 that maps onto to the region of storage used for those virtual tables. Each
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14 set bit in the bit vector corresponds to the `address point`_ for a virtual
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15 table compatible with the static type for which the bit vector is being built.
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16
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17 For example, consider the following three C++ classes:
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18
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19 .. code-block:: c++
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20
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21 struct A {
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22 virtual void f1();
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23 virtual void f2();
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24 virtual void f3();
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25 };
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26
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27 struct B : A {
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28 virtual void f1();
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29 virtual void f2();
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30 virtual void f3();
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31 };
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32
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33 struct C : A {
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34 virtual void f1();
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35 virtual void f2();
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36 virtual void f3();
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37 };
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38
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39 The scheme will cause the virtual tables for A, B and C to be laid out
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40 consecutively:
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41
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42 .. csv-table:: Virtual Table Layout for A, B, C
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43 :header: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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44
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45 A::offset-to-top, &A::rtti, &A::f1, &A::f2, &A::f3, B::offset-to-top, &B::rtti, &B::f1, &B::f2, &B::f3, C::offset-to-top, &C::rtti, &C::f1, &C::f2, &C::f3
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46
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47 The bit vector for static types A, B and C will look like this:
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48
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49 .. csv-table:: Bit Vectors for A, B, C
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50 :header: Class, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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51
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52 A, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0
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53 B, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
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54 C, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0
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55
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56 Bit vectors are represented in the object file as byte arrays. By loading
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57 from indexed offsets into the byte array and applying a mask, a program can
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58 test bits from the bit set with a relatively short instruction sequence. Bit
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59 vectors may overlap so long as they use different bits. For the full details,
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60 see the `ByteArrayBuilder`_ class.
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61
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62 In this case, assuming A is laid out at offset 0 in bit 0, B at offset 0 in
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63 bit 1 and C at offset 0 in bit 2, the byte array would look like this:
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64
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65 .. code-block:: c++
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66
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67 char bits[] = { 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 5, 0, 0 };
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68
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69 To emit a virtual call, the compiler will assemble code that checks that
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70 the object's virtual table pointer is in-bounds and aligned and that the
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71 relevant bit is set in the bit vector.
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72
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73 For example on x86 a typical virtual call may look like this:
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74
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75 .. code-block:: none
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76
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77 ca7fbb: 48 8b 0f mov (%rdi),%rcx
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78 ca7fbe: 48 8d 15 c3 42 fb 07 lea 0x7fb42c3(%rip),%rdx
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79 ca7fc5: 48 89 c8 mov %rcx,%rax
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80 ca7fc8: 48 29 d0 sub %rdx,%rax
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81 ca7fcb: 48 c1 c0 3d rol $0x3d,%rax
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82 ca7fcf: 48 3d 7f 01 00 00 cmp $0x17f,%rax
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83 ca7fd5: 0f 87 36 05 00 00 ja ca8511
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84 ca7fdb: 48 8d 15 c0 0b f7 06 lea 0x6f70bc0(%rip),%rdx
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85 ca7fe2: f6 04 10 10 testb $0x10,(%rax,%rdx,1)
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86 ca7fe6: 0f 84 25 05 00 00 je ca8511
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87 ca7fec: ff 91 98 00 00 00 callq *0x98(%rcx)
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88 [...]
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89 ca8511: 0f 0b ud2
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90
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91 The compiler relies on co-operation from the linker in order to assemble
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92 the bit vectors for the whole program. It currently does this using LLVM's
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93 `bit sets`_ mechanism together with link-time optimization.
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94
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95 .. _address point: https://mentorembedded.github.io/cxx-abi/abi.html#vtable-general
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96 .. _bit sets: http://llvm.org/docs/BitSets.html
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97 .. _ByteArrayBuilder: http://llvm.org/docs/doxygen/html/structllvm_1_1ByteArrayBuilder.html
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98
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99 Optimizations
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100 -------------
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101
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102 The scheme as described above is the fully general variant of the scheme.
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103 Most of the time we are able to apply one or more of the following
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104 optimizations to improve binary size or performance.
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105
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106 In fact, if you try the above example with the current version of the
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107 compiler, you will probably find that it will not use the described virtual
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108 table layout or machine instructions. Some of the optimizations we are about
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109 to introduce cause the compiler to use a different layout or a different
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110 sequence of machine instructions.
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111
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112 Stripping Leading/Trailing Zeros in Bit Vectors
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113 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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114
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115 If a bit vector contains leading or trailing zeros, we can strip them from
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116 the vector. The compiler will emit code to check if the pointer is in range
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117 of the region covered by ones, and perform the bit vector check using a
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118 truncated version of the bit vector. For example, the bit vectors for our
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119 example class hierarchy will be emitted like this:
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120
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121 .. csv-table:: Bit Vectors for A, B, C
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122 :header: Class, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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123
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124 A, , , 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, ,
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125 B, , , , , , , , 1, , , , , , ,
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126 C, , , , , , , , , , , , , 1, ,
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127
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128 Short Inline Bit Vectors
afa8332a0e37 LLVM 3.8
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parents:
diff changeset
129 ~~~~~~~~~~~~~~~~~~~~~~~~
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
130
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
131 If the vector is sufficiently short, we can represent it as an inline constant
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
132 on x86. This saves us a few instructions when reading the correct element
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 of the bit vector.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 If the bit vector fits in 32 bits, the code looks like this:
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 .. code-block:: none
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 dc2: 48 8b 03 mov (%rbx),%rax
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 dc5: 48 8d 15 14 1e 00 00 lea 0x1e14(%rip),%rdx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141 dcc: 48 89 c1 mov %rax,%rcx
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 dcf: 48 29 d1 sub %rdx,%rcx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143 dd2: 48 c1 c1 3d rol $0x3d,%rcx
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 dd6: 48 83 f9 03 cmp $0x3,%rcx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 dda: 77 2f ja e0b <main+0x9b>
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146 ddc: ba 09 00 00 00 mov $0x9,%edx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147 de1: 0f a3 ca bt %ecx,%edx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 de4: 73 25 jae e0b <main+0x9b>
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149 de6: 48 89 df mov %rbx,%rdi
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 de9: ff 10 callq *(%rax)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 [...]
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152 e0b: 0f 0b ud2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 Or if the bit vector fits in 64 bits:
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 .. code-block:: none
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
158 11a6: 48 8b 03 mov (%rbx),%rax
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 11a9: 48 8d 15 d0 28 00 00 lea 0x28d0(%rip),%rdx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 11b0: 48 89 c1 mov %rax,%rcx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 11b3: 48 29 d1 sub %rdx,%rcx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 11b6: 48 c1 c1 3d rol $0x3d,%rcx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 11ba: 48 83 f9 2a cmp $0x2a,%rcx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 11be: 77 35 ja 11f5 <main+0xb5>
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 11c0: 48 ba 09 00 00 00 00 movabs $0x40000000009,%rdx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 11c7: 04 00 00
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 11ca: 48 0f a3 ca bt %rcx,%rdx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 11ce: 73 25 jae 11f5 <main+0xb5>
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 11d0: 48 89 df mov %rbx,%rdi
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 11d3: ff 10 callq *(%rax)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 [...]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 11f5: 0f 0b ud2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 If the bit vector consists of a single bit, there is only one possible
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 virtual table, and the check can consist of a single equality comparison:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 .. code-block:: none
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
178
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
179 9a2: 48 8b 03 mov (%rbx),%rax
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180 9a5: 48 8d 0d a4 13 00 00 lea 0x13a4(%rip),%rcx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 9ac: 48 39 c8 cmp %rcx,%rax
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 9af: 75 25 jne 9d6 <main+0x86>
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183 9b1: 48 89 df mov %rbx,%rdi
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184 9b4: ff 10 callq *(%rax)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 [...]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
186 9d6: 0f 0b ud2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
187
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 Virtual Table Layout
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
189 ~~~~~~~~~~~~~~~~~~~~
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191 The compiler lays out classes of disjoint hierarchies in separate regions
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192 of the object file. At worst, bit vectors in disjoint hierarchies only
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 need to cover their disjoint hierarchy. But the closer that classes in
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 sub-hierarchies are laid out to each other, the smaller the bit vectors for
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 those sub-hierarchies need to be (see "Stripping Leading/Trailing Zeros in Bit
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196 Vectors" above). The `GlobalLayoutBuilder`_ class is responsible for laying
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 out the globals efficiently to minimize the sizes of the underlying bitsets.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199 .. _GlobalLayoutBuilder: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/IPO/LowerBitSets.h?view=markup
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
200
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 Alignment
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 ~~~~~~~~~
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
204 If all gaps between address points in a particular bit vector are multiples
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
205 of powers of 2, the compiler can compress the bit vector by strengthening
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 the alignment requirements of the virtual table pointer. For example, given
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 this class hierarchy:
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
208
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 .. code-block:: c++
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211 struct A {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
212 virtual void f1();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
213 virtual void f2();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
214 };
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
215
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216 struct B : A {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 virtual void f1();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
218 virtual void f2();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219 virtual void f3();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 virtual void f4();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
221 virtual void f5();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
222 virtual void f6();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
223 };
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
224
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
225 struct C : A {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
226 virtual void f1();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
227 virtual void f2();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228 };
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
229
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
230 The virtual tables will be laid out like this:
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 .. csv-table:: Virtual Table Layout for A, B, C
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 :header: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235 A::offset-to-top, &A::rtti, &A::f1, &A::f2, B::offset-to-top, &B::rtti, &B::f1, &B::f2, &B::f3, &B::f4, &B::f5, &B::f6, C::offset-to-top, &C::rtti, &C::f1, &C::f2
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 Notice that each address point for A is separated by 4 words. This lets us
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238 emit a compressed bit vector for A that looks like this:
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 .. csv-table::
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 :header: 2, 6, 10, 14
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 1, 1, 0, 1
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 At call sites, the compiler will strengthen the alignment requirements by
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 using a different rotate count. For example, on a 64-bit machine where the
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 address points are 4-word aligned (as in A from our example), the ``rol``
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248 instruction may look like this:
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 .. code-block:: none
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 dd2: 48 c1 c1 3b rol $0x3b,%rcx
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254 Padding to Powers of 2
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 ~~~~~~~~~~~~~~~~~~~~~~
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257 Of course, this alignment scheme works best if the address points are
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
258 in fact aligned correctly. To make this more likely to happen, we insert
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
259 padding between virtual tables that in many cases aligns address points to
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 a power of 2. Specifically, our padding aligns virtual tables to the next
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261 highest power of 2 bytes; because address points for specific base classes
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262 normally appear at fixed offsets within the virtual table, this normally
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263 has the effect of aligning the address points as well.
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264
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265 This scheme introduces tradeoffs between decreased space overhead for
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266 instructions and bit vectors and increased overhead in the form of padding. We
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267 therefore limit the amount of padding so that we align to no more than 128
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268 bytes. This number was found experimentally to provide a good tradeoff.
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269
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270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
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271 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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272
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273 If the bit vector is all ones, the bit vector check is redundant; we simply
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274 need to check that the address is in range and well aligned. This is more
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275 likely to occur if the virtual tables are padded.
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276
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277 Forward-Edge CFI for Indirect Function Calls
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278 ============================================
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279
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280 Sorry, no documentation yet, but see the comments at the top of
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281 ``LowerBitSets::buildBitSetsFromFunctions`` in `LowerBitSets.cpp`_.
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282
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283 .. _LowerBitSets.cpp: http://llvm.org/klaus/llvm/blob/master/lib/Transforms/IPO/LowerBitSets.cpp