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annotate lib/Target/Sparc/SparcTargetMachine.h @ 147:c2174574ed3a

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LLVM 10
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 16:55:33 +0900
parents 803732b1fca8
children
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1 //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
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2 //
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3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 // See https://llvm.org/LICENSE.txt for license information.
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5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 //
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7 //===----------------------------------------------------------------------===//
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8 //
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9 // This file declares the Sparc specific subclass of TargetMachine.
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10 //
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11 //===----------------------------------------------------------------------===//
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12
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13 #ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
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14 #define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
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15
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16 #include "SparcInstrInfo.h"
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17 #include "SparcSubtarget.h"
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18 #include "llvm/Target/TargetMachine.h"
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19
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20 namespace llvm {
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21
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22 class SparcTargetMachine : public LLVMTargetMachine {
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23 std::unique_ptr<TargetLoweringObjectFile> TLOF;
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24 SparcSubtarget Subtarget;
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25 bool is64Bit;
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26 mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
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27 public:
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28 SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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29 StringRef FS, const TargetOptions &Options,
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30 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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31 CodeGenOpt::Level OL, bool JIT, bool is64bit);
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32 ~SparcTargetMachine() override;
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33
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34 const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; }
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35 const SparcSubtarget *getSubtargetImpl(const Function &) const override;
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36
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37 // Pass Pipeline Configuration
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38 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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39 TargetLoweringObjectFile *getObjFileLowering() const override {
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40 return TLOF.get();
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41 }
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42 };
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43
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44 /// Sparc 32-bit target machine
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45 ///
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46 class SparcV8TargetMachine : public SparcTargetMachine {
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47 virtual void anchor();
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48 public:
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49 SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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50 StringRef FS, const TargetOptions &Options,
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51 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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52 CodeGenOpt::Level OL, bool JIT);
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53 };
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54
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55 /// Sparc 64-bit target machine
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56 ///
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57 class SparcV9TargetMachine : public SparcTargetMachine {
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58 virtual void anchor();
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59 public:
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60 SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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61 StringRef FS, const TargetOptions &Options,
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62 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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63 CodeGenOpt::Level OL, bool JIT);
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64 };
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66 class SparcelTargetMachine : public SparcTargetMachine {
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67 virtual void anchor();
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69 public:
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70 SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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71 StringRef FS, const TargetOptions &Options,
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72 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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73 CodeGenOpt::Level OL, bool JIT);
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74 };
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76 } // end namespace llvm
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78 #endif