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annotate test/CodeGen/MIR/X86/stack-object-operands.mir @ 147:c2174574ed3a

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LLVM 10
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 16:55:33 +0900
parents 3a76565eade5
children
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1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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2 # RUN: llc -march=x86 -run-pass none -o - %s | FileCheck %s
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3 # This test ensures that the MIR parser parses stack object machine operands
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4 # correctly.
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5
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6 --- |
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7
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8 define i32 @test(i32 %a) {
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9 entry:
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10 %b = alloca i32
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11 %0 = alloca i32
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12 store i32 %a, i32* %b
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13 store i32 2, i32* %0
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14 %c = load i32, i32* %b
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15 ret i32 %c
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16 }
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17
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18 ...
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19 ---
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20 name: test
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21 tracksRegLiveness: true
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22 registers:
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23 - { id: 0, class: gr32 }
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24 - { id: 1, class: gr32 }
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25 frameInfo:
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26 maxAlignment: 4
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27 fixedStack:
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28 - { id: 0, offset: 0, size: 4, isImmutable: true, isAliased: false }
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29 stack:
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30 - { id: 0, name: b, size: 4, alignment: 4 }
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31 - { id: 1, size: 4, alignment: 4 }
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32 body: |
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33 bb.0.entry:
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34 ; CHECK-LABEL: name: test
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35 ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg
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36 ; CHECK: MOV32mr %stack.0.b, 1, $noreg, 0, $noreg, [[MOV32rm]]
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37 ; CHECK: MOV32mi %stack.1, 1, $noreg, 0, $noreg, 2
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38 ; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %stack.0.b, 1, $noreg, 0, $noreg
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39 ; CHECK: $eax = COPY [[MOV32rm1]]
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40 ; CHECK: RETL $eax
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41 %0 = MOV32rm %fixed-stack.0, 1, _, 0, _
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42 MOV32mr %stack.0.b, 1, _, 0, _, %0
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43 MOV32mi %stack.1, 1, _, 0, _, 2
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44 %1 = MOV32rm %stack.0, 1, _, 0, _
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45 $eax = COPY %1
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46 RETL $eax
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47 ...