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annotate lib/Target/TargetSubtargetInfo.cpp @ 52:c22698ecb2a9

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modified CreateIdentifierInfo and create new function which was named 'CreateUniqueIdentifierInfo'.
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Wed, 15 Jan 2014 21:01:33 +0900
parents 95c75e76d11b
children 54457678186b
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1 //===-- TargetSubtargetInfo.cpp - General Target Information ---------------==//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file describes the general parts of a Subtarget.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #include "llvm/Support/CommandLine.h"
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15 #include "llvm/Target/TargetSubtargetInfo.h"
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16 #include "llvm/ADT/SmallVector.h"
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17 using namespace llvm;
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18
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19 //---------------------------------------------------------------------------
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20 // TargetSubtargetInfo Class
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21 //
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22 TargetSubtargetInfo::TargetSubtargetInfo() {}
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23
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24 TargetSubtargetInfo::~TargetSubtargetInfo() {}
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25
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26 // Temporary option to compare overall performance change when moving from the
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27 // SD scheduler to the MachineScheduler pass pipeline. It should be removed
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28 // before 3.4. The normal way to enable/disable the MachineScheduling pass
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29 // itself is by using -enable-misched. For targets that already use MI sched
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30 // (via MySubTarget::enableMachineScheduler()) -misched-bench=false negates the
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31 // subtarget hook.
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32 static cl::opt<bool> BenchMachineSched("misched-bench", cl::Hidden,
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33 cl::desc("Migrate from the target's default SD scheduler to MI scheduler"));
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34
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35 bool TargetSubtargetInfo::useMachineScheduler() const {
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36 if (BenchMachineSched.getNumOccurrences())
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37 return BenchMachineSched;
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38 return enableMachineScheduler();
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39 }
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40
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41 bool TargetSubtargetInfo::enableMachineScheduler() const {
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42 return false;
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43 }
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45 bool TargetSubtargetInfo::enablePostRAScheduler(
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46 CodeGenOpt::Level OptLevel,
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47 AntiDepBreakMode& Mode,
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48 RegClassVector& CriticalPathRCs) const {
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49 Mode = ANTIDEP_NONE;
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50 CriticalPathRCs.clear();
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51 return false;
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52 }
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53
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54 bool TargetSubtargetInfo::useAA() const {
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55 return false;
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56 }