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221
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1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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2 ; RUN: opt -passes=indvars -S < %s | FileCheck %s
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3
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4 ; Monotonic decrementing iv. we should be able to prove that %iv.next <s len
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5 ; basing on its nsw and the fact that its starting value <s len.
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6 define i32 @test_01(i32* %p) {
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7 ; CHECK-LABEL: @test_01(
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8 ; CHECK-NEXT: entry:
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9 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG0:!range !.*]]
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10 ; CHECK-NEXT: br label [[LOOP:%.*]]
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11 ; CHECK: loop:
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12 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
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13 ; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], -1
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14 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
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15 ; CHECK: backedge:
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16 ; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[IV]], 0
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17 ; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
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18 ; CHECK: fail:
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19 ; CHECK-NEXT: ret i32 -1
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20 ; CHECK: exit:
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21 ; CHECK-NEXT: ret i32 0
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22 ;
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23 entry:
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24 %len = load i32, i32* %p, !range !0
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25 br label %loop
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26
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27 loop:
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28 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
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29 %iv.next = add i32 %iv, -1
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30 %rc = icmp slt i32 %iv.next, %len
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31 br i1 %rc, label %backedge, label %fail
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32
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33 backedge:
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34 %loop.cond = icmp ne i32 %iv, 0
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35 br i1 %loop.cond, label %loop, label %exit
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36
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37 fail:
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38 ret i32 -1
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39
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40 exit:
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41 ret i32 0
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42 }
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43
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44 ; We should not remove this range check because signed overflow is possible here (start at len = 0).
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45 define i32 @test_01_neg(i32* %p) {
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46 ; CHECK-LABEL: @test_01_neg(
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47 ; CHECK-NEXT: entry:
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48 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG0]]
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49 ; CHECK-NEXT: br label [[LOOP:%.*]]
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50 ; CHECK: loop:
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51 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
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52 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], -1
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53 ; CHECK-NEXT: [[RC:%.*]] = icmp slt i32 [[IV_NEXT]], [[LEN]]
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54 ; CHECK-NEXT: br i1 [[RC]], label [[BACKEDGE]], label [[FAIL:%.*]]
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55 ; CHECK: backedge:
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56 ; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[IV]], 1
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57 ; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
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58 ; CHECK: fail:
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59 ; CHECK-NEXT: ret i32 -1
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60 ; CHECK: exit:
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61 ; CHECK-NEXT: ret i32 0
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62 ;
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63 entry:
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64 %len = load i32, i32* %p, !range !0
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65 br label %loop
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66
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67 loop:
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68 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
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69 %iv.next = add i32 %iv, -1
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70 %rc = icmp slt i32 %iv.next, %len
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71 br i1 %rc, label %backedge, label %fail
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72
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73 backedge:
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74 %loop.cond = icmp ne i32 %iv, 1
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75 br i1 %loop.cond, label %loop, label %exit
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76
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77 fail:
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78 ret i32 -1
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79
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80 exit:
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81 ret i32 0
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82 }
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83
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84 ; Monotonic incrementing iv. we should be able to prove that %iv.next >s len
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85 ; basing on its nsw and the fact that its starting value >s len.
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86 define i32 @test_02(i32* %p) {
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87 ; CHECK-LABEL: @test_02(
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88 ; CHECK-NEXT: entry:
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89 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG1:!range !.*]]
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90 ; CHECK-NEXT: br label [[LOOP:%.*]]
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91 ; CHECK: loop:
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92 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
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93 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
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94 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
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95 ; CHECK: backedge:
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96 ; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[IV]], 0
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97 ; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
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98 ; CHECK: fail:
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99 ; CHECK-NEXT: ret i32 -1
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100 ; CHECK: exit:
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101 ; CHECK-NEXT: ret i32 0
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102 ;
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103 entry:
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104 %len = load i32, i32* %p, !range !1
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105 br label %loop
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106
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107 loop:
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108 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
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109 %iv.next = add i32 %iv, 1
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110 %rc = icmp sgt i32 %iv.next, %len
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111 br i1 %rc, label %backedge, label %fail
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112
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113 backedge:
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114 %loop.cond = icmp ne i32 %iv, 0
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115 br i1 %loop.cond, label %loop, label %exit
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116
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117 fail:
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118 ret i32 -1
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119
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120 exit:
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121 ret i32 0
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122 }
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123
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124 ; We should not remove this range check because signed overflow is possible here (start at len = -1).
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125 define i32 @test_02_neg(i32* %p) {
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126 ; CHECK-LABEL: @test_02_neg(
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127 ; CHECK-NEXT: entry:
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128 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG1]]
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129 ; CHECK-NEXT: br label [[LOOP:%.*]]
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130 ; CHECK: loop:
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131 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
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132 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
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133 ; CHECK-NEXT: [[RC:%.*]] = icmp sgt i32 [[IV_NEXT]], [[LEN]]
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134 ; CHECK-NEXT: br i1 [[RC]], label [[BACKEDGE]], label [[FAIL:%.*]]
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135 ; CHECK: backedge:
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136 ; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[IV]], -2
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137 ; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
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138 ; CHECK: fail:
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139 ; CHECK-NEXT: ret i32 -1
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140 ; CHECK: exit:
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141 ; CHECK-NEXT: ret i32 0
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142 ;
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143 entry:
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144 %len = load i32, i32* %p, !range !1
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145 br label %loop
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146
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147 loop:
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148 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
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149 %iv.next = add i32 %iv, 1
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150 %rc = icmp sgt i32 %iv.next, %len
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151 br i1 %rc, label %backedge, label %fail
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152
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153 backedge:
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154 %loop.cond = icmp ne i32 %iv, -2
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155 br i1 %loop.cond, label %loop, label %exit
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156
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157 fail:
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158 ret i32 -1
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159
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160 exit:
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161 ret i32 0
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162 }
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163
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164 define i32 @test_03(i32* %p) {
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165 ; CHECK-LABEL: @test_03(
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166 ; CHECK-NEXT: entry:
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167 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG2:!range !.*]]
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168 ; CHECK-NEXT: br label [[LOOP:%.*]]
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169 ; CHECK: loop:
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170 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
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171 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
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172 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
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173 ; CHECK: backedge:
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174 ; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[IV]], 1000
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175 ; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
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176 ; CHECK: fail:
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177 ; CHECK-NEXT: ret i32 -1
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178 ; CHECK: exit:
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179 ; CHECK-NEXT: ret i32 0
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180 ;
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181 entry:
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182 %len = load i32, i32* %p, !range !2
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183 br label %loop
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184
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185 loop:
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186 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
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187 %iv.next = add i32 %iv, 1
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188 %rc = icmp sgt i32 %iv.next, %len
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189 br i1 %rc, label %backedge, label %fail
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190
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191 backedge:
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192 %loop.cond = icmp ne i32 %iv, 1000
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193 br i1 %loop.cond, label %loop, label %exit
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194
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195 fail:
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196 ret i32 -1
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197
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198 exit:
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199 ret i32 0
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200 }
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201
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202 define i32 @test_04(i32* %p) {
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203 ; CHECK-LABEL: @test_04(
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204 ; CHECK-NEXT: entry:
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205 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG2]]
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206 ; CHECK-NEXT: br label [[LOOP:%.*]]
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207 ; CHECK: loop:
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208 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
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209 ; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], -1
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210 ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
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211 ; CHECK: backedge:
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212 ; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[IV]], 0
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213 ; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
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214 ; CHECK: fail:
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215 ; CHECK-NEXT: ret i32 -1
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216 ; CHECK: exit:
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217 ; CHECK-NEXT: ret i32 0
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218 ;
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219 entry:
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220 %len = load i32, i32* %p, !range !2
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221 br label %loop
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222
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223 loop:
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224 %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
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225 %iv.next = add i32 %iv, -1
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226 %rc = icmp slt i32 %iv.next, %len
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227 br i1 %rc, label %backedge, label %fail
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228
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229 backedge:
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230 %loop.cond = icmp ne i32 %iv, 0
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231 br i1 %loop.cond, label %loop, label %exit
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232
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233 fail:
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234 ret i32 -1
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235
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236 exit:
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237 ret i32 0
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238 }
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239
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240 !0 = !{i32 0, i32 2147483647}
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241 !1 = !{i32 -2147483648, i32 0}
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242 !2 = !{i32 0, i32 1000}
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