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1 //===- Target.cpp ---------------------------------------------------------===//
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2 //
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3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 // See https://llvm.org/LICENSE.txt for license information.
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5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 //
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7 //===----------------------------------------------------------------------===//
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8 //
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9 // Machine-specific things, such as applying relocations, creation of
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10 // GOT or PLT entries, etc., are handled in this file.
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11 //
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12 // Refer the ELF spec for the single letter variables, S, A or P, used
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13 // in this file.
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14 //
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15 // Some functions defined in this file has "relaxTls" as part of their names.
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16 // They do peephole optimization for TLS variables by rewriting instructions.
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17 // They are not part of the ABI but optional optimization, so you can skip
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18 // them if you are not interested in how TLS variables are optimized.
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19 // See the following paper for the details.
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20 //
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21 // Ulrich Drepper, ELF Handling For Thread-Local Storage
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22 // http://www.akkadia.org/drepper/tls.pdf
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23 //
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24 //===----------------------------------------------------------------------===//
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25
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26 #include "Target.h"
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27 #include "InputFiles.h"
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28 #include "OutputSections.h"
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29 #include "SymbolTable.h"
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30 #include "Symbols.h"
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31 #include "SyntheticSections.h"
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32 #include "lld/Common/ErrorHandler.h"
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33 #include "llvm/Object/ELF.h"
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34
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35 using namespace llvm;
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36 using namespace llvm::object;
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37 using namespace llvm::ELF;
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173
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38 using namespace lld;
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39 using namespace lld::elf;
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150
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40
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173
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41 const TargetInfo *elf::target;
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42
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43 std::string lld::toString(RelType type) {
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150
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44 StringRef s = getELFRelocationTypeName(elf::config->emachine, type);
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45 if (s == "Unknown")
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46 return ("Unknown (" + Twine(type) + ")").str();
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47 return std::string(s);
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48 }
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49
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173
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50 TargetInfo *elf::getTarget() {
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150
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51 switch (config->emachine) {
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52 case EM_386:
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53 case EM_IAMCU:
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54 return getX86TargetInfo();
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55 case EM_AARCH64:
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56 return getAArch64TargetInfo();
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57 case EM_AMDGPU:
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58 return getAMDGPUTargetInfo();
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59 case EM_ARM:
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60 return getARMTargetInfo();
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61 case EM_AVR:
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62 return getAVRTargetInfo();
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63 case EM_HEXAGON:
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64 return getHexagonTargetInfo();
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65 case EM_MIPS:
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66 switch (config->ekind) {
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67 case ELF32LEKind:
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68 return getMipsTargetInfo<ELF32LE>();
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69 case ELF32BEKind:
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70 return getMipsTargetInfo<ELF32BE>();
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71 case ELF64LEKind:
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72 return getMipsTargetInfo<ELF64LE>();
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73 case ELF64BEKind:
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74 return getMipsTargetInfo<ELF64BE>();
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75 default:
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76 llvm_unreachable("unsupported MIPS target");
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77 }
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78 case EM_MSP430:
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79 return getMSP430TargetInfo();
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80 case EM_PPC:
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81 return getPPCTargetInfo();
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82 case EM_PPC64:
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83 return getPPC64TargetInfo();
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84 case EM_RISCV:
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85 return getRISCVTargetInfo();
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86 case EM_SPARCV9:
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87 return getSPARCV9TargetInfo();
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88 case EM_X86_64:
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89 return getX86_64TargetInfo();
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90 }
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91 llvm_unreachable("unknown target machine");
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92 }
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93
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94 template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *loc) {
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95 assert(loc != nullptr);
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96 for (InputSectionBase *d : inputSections) {
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97 auto *isec = cast<InputSection>(d);
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98 if (!isec->getParent() || (isec->type & SHT_NOBITS))
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99 continue;
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100
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101 const uint8_t *isecLoc =
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102 Out::bufferStart
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103 ? (Out::bufferStart + isec->getParent()->offset + isec->outSecOff)
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104 : isec->data().data();
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105 if (isecLoc == nullptr) {
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106 assert(isa<SyntheticSection>(isec) && "No data but not synthetic?");
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107 continue;
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108 }
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109 if (isecLoc <= loc && loc < isecLoc + isec->getSize())
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110 return {isec, isec->template getLocation<ELFT>(loc - isecLoc) + ": "};
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111 }
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112 return {};
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113 }
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114
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173
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115 ErrorPlace elf::getErrorPlace(const uint8_t *loc) {
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150
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116 switch (config->ekind) {
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117 case ELF32LEKind:
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118 return getErrPlace<ELF32LE>(loc);
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119 case ELF32BEKind:
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120 return getErrPlace<ELF32BE>(loc);
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121 case ELF64LEKind:
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122 return getErrPlace<ELF64LE>(loc);
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123 case ELF64BEKind:
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124 return getErrPlace<ELF64BE>(loc);
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125 default:
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126 llvm_unreachable("unknown ELF type");
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127 }
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128 }
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129
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130 TargetInfo::~TargetInfo() {}
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131
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132 int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const {
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133 return 0;
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134 }
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135
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136 bool TargetInfo::usesOnlyLowPageBits(RelType type) const { return false; }
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137
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138 bool TargetInfo::needsThunk(RelExpr expr, RelType type, const InputFile *file,
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139 uint64_t branchAddr, const Symbol &s,
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140 int64_t a) const {
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141 return false;
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142 }
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143
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144 bool TargetInfo::adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end,
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145 uint8_t stOther) const {
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146 llvm_unreachable("Target doesn't support split stacks.");
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147 }
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148
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149 bool TargetInfo::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
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150 return true;
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151 }
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152
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153 RelExpr TargetInfo::adjustRelaxExpr(RelType type, const uint8_t *data,
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154 RelExpr expr) const {
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155 return expr;
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156 }
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157
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158 void TargetInfo::relaxGot(uint8_t *loc, const Relocation &rel,
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159 uint64_t val) const {
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160 llvm_unreachable("Should not have claimed to be relaxable");
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161 }
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162
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163 void TargetInfo::relaxTlsGdToLe(uint8_t *loc, const Relocation &rel,
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164 uint64_t val) const {
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165 llvm_unreachable("Should not have claimed to be relaxable");
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166 }
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167
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168 void TargetInfo::relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
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169 uint64_t val) const {
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170 llvm_unreachable("Should not have claimed to be relaxable");
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171 }
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172
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173 void TargetInfo::relaxTlsIeToLe(uint8_t *loc, const Relocation &rel,
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174 uint64_t val) const {
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175 llvm_unreachable("Should not have claimed to be relaxable");
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176 }
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177
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178 void TargetInfo::relaxTlsLdToLe(uint8_t *loc, const Relocation &rel,
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179 uint64_t val) const {
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180 llvm_unreachable("Should not have claimed to be relaxable");
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181 }
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182
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183 uint64_t TargetInfo::getImageBase() const {
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184 // Use -image-base if set. Fall back to the target default if not.
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185 if (config->imageBase)
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186 return *config->imageBase;
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187 return config->isPic ? 0 : defaultImageBase;
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188 }
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