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150
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1 // REQUIRES: arm
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2 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-tls-get-addr.s -o %t1.o
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3 // RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so
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4 // RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
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5 // RUN: ld.lld %t1.so %t.o -o %t
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173
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6 // RUN: llvm-objdump -s --triple=armv7a-linux-gnueabi %t | FileCheck %s
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150
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7
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173
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8 /// This tls Initial Exec sequence is with respect to a non-preemptible symbol
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9 /// so a relaxation would normally be possible. This would result in an assertion
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10 /// failure on ARM as the relaxation functions can't be implemented on ARM.
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11 /// Check that the sequence is handled as initial exec
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150
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12 .text
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13 .syntax unified
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14 .globl func
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15 .p2align 2
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16 .type func,%function
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17 func:
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18 .L0:
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19 .globl __tls_get_addr
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20 bl __tls_get_addr
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21 .L1:
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22 bx lr
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23 .p2align 2
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24 .Lt0: .word x1(gottpoff) + (. - .L0 - 8)
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25 .Lt1: .word x2(gottpoff) + (. - .L1 - 8)
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26
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27 .globl x1
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28 .section .trw,"awT",%progbits
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29 .p2align 2
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30 x1:
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31 .word 0x1
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32 .globl x2
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33 .section .tbss,"awT",%nobits
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34 .type x1, %object
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35 x2:
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36 .space 4
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37 .type x2, %object
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38
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39 // CHECK: Contents of section .got:
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173
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40 /// x1 at offset 8 from TP, x2 at offset 0xc from TP. Offsets include TCB size of 8
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41 // CHECK-NEXT: 3027c 08000000 0c000000
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