annotate lib/Target/AVR/AVRRelaxMemOperations.cpp @ 137:dc788094b8e4

force SROA and TailRecursionElimination on non optimize mode for code segment
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 06 Mar 2018 08:58:23 +0900
parents 3a76565eade5
children c2174574ed3a
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1 //===-- AVRRelaxMemOperations.cpp - Relax out of range loads/stores -------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file contains a pass which relaxes out of range memory operations into
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11 // equivalent operations which handle bigger addresses.
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12 //
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13 //===----------------------------------------------------------------------===//
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14
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15 #include "AVR.h"
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16 #include "AVRInstrInfo.h"
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17 #include "AVRTargetMachine.h"
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18 #include "MCTargetDesc/AVRMCTargetDesc.h"
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19
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20 #include "llvm/CodeGen/MachineFunctionPass.h"
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21 #include "llvm/CodeGen/MachineInstrBuilder.h"
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22 #include "llvm/CodeGen/MachineRegisterInfo.h"
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23 #include "llvm/CodeGen/TargetRegisterInfo.h"
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24
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25 using namespace llvm;
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26
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27 #define AVR_RELAX_MEM_OPS_NAME "AVR memory operation relaxation pass"
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28
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29 namespace {
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30
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31 class AVRRelaxMem : public MachineFunctionPass {
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32 public:
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33 static char ID;
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34
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35 AVRRelaxMem() : MachineFunctionPass(ID) {
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36 initializeAVRRelaxMemPass(*PassRegistry::getPassRegistry());
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37 }
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38
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39 bool runOnMachineFunction(MachineFunction &MF) override;
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40
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41 StringRef getPassName() const override { return AVR_RELAX_MEM_OPS_NAME; }
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42
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43 private:
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44 typedef MachineBasicBlock Block;
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45 typedef Block::iterator BlockIt;
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46
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47 const TargetInstrInfo *TII;
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48
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49 template <unsigned OP> bool relax(Block &MBB, BlockIt MBBI);
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50
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51 bool runOnBasicBlock(Block &MBB);
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52 bool runOnInstruction(Block &MBB, BlockIt MBBI);
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53
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54 MachineInstrBuilder buildMI(Block &MBB, BlockIt MBBI, unsigned Opcode) {
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55 return BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(Opcode));
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56 }
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57 };
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58
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59 char AVRRelaxMem::ID = 0;
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60
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61 bool AVRRelaxMem::runOnMachineFunction(MachineFunction &MF) {
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62 bool Modified = false;
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63
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64 const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
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65 TII = STI.getInstrInfo();
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66
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67 for (Block &MBB : MF) {
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68 bool BlockModified = runOnBasicBlock(MBB);
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69 Modified |= BlockModified;
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70 }
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71
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72 return Modified;
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73 }
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74
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75 bool AVRRelaxMem::runOnBasicBlock(Block &MBB) {
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76 bool Modified = false;
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77
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78 BlockIt MBBI = MBB.begin(), E = MBB.end();
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79 while (MBBI != E) {
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80 BlockIt NMBBI = std::next(MBBI);
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81 Modified |= runOnInstruction(MBB, MBBI);
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82 MBBI = NMBBI;
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83 }
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84
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85 return Modified;
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86 }
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87
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88 template <>
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89 bool AVRRelaxMem::relax<AVR::STDWPtrQRr>(Block &MBB, BlockIt MBBI) {
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90 MachineInstr &MI = *MBBI;
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91
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92 MachineOperand &Ptr = MI.getOperand(0);
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93 MachineOperand &Src = MI.getOperand(2);
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94 int64_t Imm = MI.getOperand(1).getImm();
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95
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96 // We can definitely optimise this better.
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97 if (Imm > 63) {
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98 // Push the previous state of the pointer register.
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99 // This instruction must preserve the value.
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100 buildMI(MBB, MBBI, AVR::PUSHWRr)
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101 .addReg(Ptr.getReg());
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102
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103 // Add the immediate to the pointer register.
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104 buildMI(MBB, MBBI, AVR::SBCIWRdK)
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105 .addReg(Ptr.getReg(), RegState::Define)
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106 .addReg(Ptr.getReg())
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107 .addImm(-Imm);
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108
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109 // Store the value in the source register to the address
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110 // pointed to by the pointer register.
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111 buildMI(MBB, MBBI, AVR::STWPtrRr)
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112 .addReg(Ptr.getReg())
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113 .addReg(Src.getReg(), getKillRegState(Src.isKill()));
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114
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115 // Pop the original state of the pointer register.
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116 buildMI(MBB, MBBI, AVR::POPWRd)
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117 .addReg(Ptr.getReg(), getKillRegState(Ptr.isKill()));
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118
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119 MI.removeFromParent();
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120 }
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121
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122 return false;
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123 }
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124
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125 bool AVRRelaxMem::runOnInstruction(Block &MBB, BlockIt MBBI) {
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126 MachineInstr &MI = *MBBI;
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127 int Opcode = MBBI->getOpcode();
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128
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129 #define RELAX(Op) \
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130 case Op: \
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131 return relax<Op>(MBB, MI)
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132
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133 switch (Opcode) {
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134 RELAX(AVR::STDWPtrQRr);
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135 }
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136 #undef RELAX
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137 return false;
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138 }
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139
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140 } // end of anonymous namespace
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141
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142 INITIALIZE_PASS(AVRRelaxMem, "avr-relax-mem",
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143 AVR_RELAX_MEM_OPS_NAME, false, false)
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144
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145 namespace llvm {
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146
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147 FunctionPass *createAVRRelaxMemPass() { return new AVRRelaxMem(); }
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148
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149 } // end of namespace llvm