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annotate lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp @ 137:dc788094b8e4

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force SROA and TailRecursionElimination on non optimize mode for code segment
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 06 Mar 2018 08:58:23 +0900
parents 803732b1fca8
children c2174574ed3a
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rev   line source
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1 //===-- X86MCTargetDesc.cpp - X86 Target Descriptions ---------------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file provides X86 specific target descriptions.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #include "X86MCTargetDesc.h"
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15 #include "InstPrinter/X86ATTInstPrinter.h"
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16 #include "InstPrinter/X86IntelInstPrinter.h"
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17 #include "X86MCAsmInfo.h"
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18 #include "llvm/ADT/Triple.h"
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19 #include "llvm/DebugInfo/CodeView/CodeView.h"
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20 #include "llvm/MC/MCInstrAnalysis.h"
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21 #include "llvm/MC/MCInstrInfo.h"
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22 #include "llvm/MC/MCRegisterInfo.h"
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23 #include "llvm/MC/MCStreamer.h"
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24 #include "llvm/MC/MCSubtargetInfo.h"
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25 #include "llvm/MC/MachineLocation.h"
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26 #include "llvm/Support/ErrorHandling.h"
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27 #include "llvm/Support/Host.h"
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28 #include "llvm/Support/TargetRegistry.h"
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29
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30 #if _MSC_VER
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31 #include <intrin.h>
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32 #endif
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33
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34 using namespace llvm;
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35
0
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36 #define GET_REGINFO_MC_DESC
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37 #include "X86GenRegisterInfo.inc"
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38
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39 #define GET_INSTRINFO_MC_DESC
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40 #include "X86GenInstrInfo.inc"
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41
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42 #define GET_SUBTARGETINFO_MC_DESC
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43 #include "X86GenSubtargetInfo.inc"
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44
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45 std::string X86_MC::ParseX86Triple(const Triple &TT) {
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46 std::string FS;
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47 if (TT.getArch() == Triple::x86_64)
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48 FS = "+64bit-mode,-32bit-mode,-16bit-mode";
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49 else if (TT.getEnvironment() != Triple::CODE16)
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50 FS = "-64bit-mode,+32bit-mode,-16bit-mode";
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51 else
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52 FS = "-64bit-mode,-32bit-mode,+16bit-mode";
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53
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54 return FS;
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55 }
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56
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57 unsigned X86_MC::getDwarfRegFlavour(const Triple &TT, bool isEH) {
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58 if (TT.getArch() == Triple::x86_64)
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59 return DWARFFlavour::X86_64;
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60
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61 if (TT.isOSDarwin())
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62 return isEH ? DWARFFlavour::X86_32_DarwinEH : DWARFFlavour::X86_32_Generic;
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63 if (TT.isOSCygMing())
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64 // Unsupported by now, just quick fallback
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65 return DWARFFlavour::X86_32_Generic;
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66 return DWARFFlavour::X86_32_Generic;
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67 }
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68
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69 void X86_MC::initLLVMToSEHAndCVRegMapping(MCRegisterInfo *MRI) {
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70 // FIXME: TableGen these.
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71 for (unsigned Reg = X86::NoRegister + 1; Reg < X86::NUM_TARGET_REGS; ++Reg) {
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72 unsigned SEH = MRI->getEncodingValue(Reg);
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73 MRI->mapLLVMRegToSEHReg(Reg, SEH);
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74 }
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75
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76 // Mapping from CodeView to MC register id.
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77 static const struct {
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78 codeview::RegisterId CVReg;
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79 MCPhysReg Reg;
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80 } RegMap[] = {
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81 { codeview::RegisterId::AL, X86::AL},
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82 { codeview::RegisterId::CL, X86::CL},
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83 { codeview::RegisterId::DL, X86::DL},
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84 { codeview::RegisterId::BL, X86::BL},
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85 { codeview::RegisterId::AH, X86::AH},
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86 { codeview::RegisterId::CH, X86::CH},
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87 { codeview::RegisterId::DH, X86::DH},
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88 { codeview::RegisterId::BH, X86::BH},
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89 { codeview::RegisterId::AX, X86::AX},
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90 { codeview::RegisterId::CX, X86::CX},
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91 { codeview::RegisterId::DX, X86::DX},
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92 { codeview::RegisterId::BX, X86::BX},
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93 { codeview::RegisterId::SP, X86::SP},
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94 { codeview::RegisterId::BP, X86::BP},
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95 { codeview::RegisterId::SI, X86::SI},
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96 { codeview::RegisterId::DI, X86::DI},
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97 { codeview::RegisterId::EAX, X86::EAX},
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98 { codeview::RegisterId::ECX, X86::ECX},
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99 { codeview::RegisterId::EDX, X86::EDX},
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100 { codeview::RegisterId::EBX, X86::EBX},
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101 { codeview::RegisterId::ESP, X86::ESP},
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102 { codeview::RegisterId::EBP, X86::EBP},
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103 { codeview::RegisterId::ESI, X86::ESI},
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104 { codeview::RegisterId::EDI, X86::EDI},
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105
121
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106 { codeview::RegisterId::EFLAGS, X86::EFLAGS},
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107
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108 { codeview::RegisterId::ST0, X86::FP0},
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109 { codeview::RegisterId::ST1, X86::FP1},
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110 { codeview::RegisterId::ST2, X86::FP2},
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111 { codeview::RegisterId::ST3, X86::FP3},
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112 { codeview::RegisterId::ST4, X86::FP4},
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113 { codeview::RegisterId::ST5, X86::FP5},
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114 { codeview::RegisterId::ST6, X86::FP6},
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115 { codeview::RegisterId::ST7, X86::FP7},
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116
121
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117 { codeview::RegisterId::XMM0, X86::XMM0},
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118 { codeview::RegisterId::XMM1, X86::XMM1},
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119 { codeview::RegisterId::XMM2, X86::XMM2},
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120 { codeview::RegisterId::XMM3, X86::XMM3},
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121 { codeview::RegisterId::XMM4, X86::XMM4},
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122 { codeview::RegisterId::XMM5, X86::XMM5},
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123 { codeview::RegisterId::XMM6, X86::XMM6},
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124 { codeview::RegisterId::XMM7, X86::XMM7},
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125
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126 { codeview::RegisterId::XMM8, X86::XMM8},
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127 { codeview::RegisterId::XMM9, X86::XMM9},
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128 { codeview::RegisterId::XMM10, X86::XMM10},
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129 { codeview::RegisterId::XMM11, X86::XMM11},
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130 { codeview::RegisterId::XMM12, X86::XMM12},
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131 { codeview::RegisterId::XMM13, X86::XMM13},
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132 { codeview::RegisterId::XMM14, X86::XMM14},
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133 { codeview::RegisterId::XMM15, X86::XMM15},
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134
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135 { codeview::RegisterId::SIL, X86::SIL},
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136 { codeview::RegisterId::DIL, X86::DIL},
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137 { codeview::RegisterId::BPL, X86::BPL},
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138 { codeview::RegisterId::SPL, X86::SPL},
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139 { codeview::RegisterId::RAX, X86::RAX},
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140 { codeview::RegisterId::RBX, X86::RBX},
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141 { codeview::RegisterId::RCX, X86::RCX},
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142 { codeview::RegisterId::RDX, X86::RDX},
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143 { codeview::RegisterId::RSI, X86::RSI},
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144 { codeview::RegisterId::RDI, X86::RDI},
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145 { codeview::RegisterId::RBP, X86::RBP},
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146 { codeview::RegisterId::RSP, X86::RSP},
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parents: 120
diff changeset
147 { codeview::RegisterId::R8, X86::R8},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
148 { codeview::RegisterId::R9, X86::R9},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
149 { codeview::RegisterId::R10, X86::R10},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
150 { codeview::RegisterId::R11, X86::R11},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
151 { codeview::RegisterId::R12, X86::R12},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
152 { codeview::RegisterId::R13, X86::R13},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
153 { codeview::RegisterId::R14, X86::R14},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
154 { codeview::RegisterId::R15, X86::R15},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
155 { codeview::RegisterId::R8B, X86::R8B},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
156 { codeview::RegisterId::R9B, X86::R9B},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
157 { codeview::RegisterId::R10B, X86::R10B},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
158 { codeview::RegisterId::R11B, X86::R11B},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
159 { codeview::RegisterId::R12B, X86::R12B},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
160 { codeview::RegisterId::R13B, X86::R13B},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
161 { codeview::RegisterId::R14B, X86::R14B},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
162 { codeview::RegisterId::R15B, X86::R15B},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
163 { codeview::RegisterId::R8W, X86::R8W},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
164 { codeview::RegisterId::R9W, X86::R9W},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
165 { codeview::RegisterId::R10W, X86::R10W},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
166 { codeview::RegisterId::R11W, X86::R11W},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
167 { codeview::RegisterId::R12W, X86::R12W},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
168 { codeview::RegisterId::R13W, X86::R13W},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
169 { codeview::RegisterId::R14W, X86::R14W},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
170 { codeview::RegisterId::R15W, X86::R15W},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
171 { codeview::RegisterId::R8D, X86::R8D},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
172 { codeview::RegisterId::R9D, X86::R9D},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
173 { codeview::RegisterId::R10D, X86::R10D},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
174 { codeview::RegisterId::R11D, X86::R11D},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
175 { codeview::RegisterId::R12D, X86::R12D},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
176 { codeview::RegisterId::R13D, X86::R13D},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
177 { codeview::RegisterId::R14D, X86::R14D},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
178 { codeview::RegisterId::R15D, X86::R15D},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
179 { codeview::RegisterId::AMD64_YMM0, X86::YMM0},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
180 { codeview::RegisterId::AMD64_YMM1, X86::YMM1},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
181 { codeview::RegisterId::AMD64_YMM2, X86::YMM2},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
182 { codeview::RegisterId::AMD64_YMM3, X86::YMM3},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
183 { codeview::RegisterId::AMD64_YMM4, X86::YMM4},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
184 { codeview::RegisterId::AMD64_YMM5, X86::YMM5},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
185 { codeview::RegisterId::AMD64_YMM6, X86::YMM6},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
186 { codeview::RegisterId::AMD64_YMM7, X86::YMM7},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
187 { codeview::RegisterId::AMD64_YMM8, X86::YMM8},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
188 { codeview::RegisterId::AMD64_YMM9, X86::YMM9},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
189 { codeview::RegisterId::AMD64_YMM10, X86::YMM10},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
190 { codeview::RegisterId::AMD64_YMM11, X86::YMM11},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
191 { codeview::RegisterId::AMD64_YMM12, X86::YMM12},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
192 { codeview::RegisterId::AMD64_YMM13, X86::YMM13},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
193 { codeview::RegisterId::AMD64_YMM14, X86::YMM14},
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
194 { codeview::RegisterId::AMD64_YMM15, X86::YMM15},
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
195 };
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
196 for (unsigned I = 0; I < array_lengthof(RegMap); ++I)
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
197 MRI->mapLLVMRegToCVReg(RegMap[I].Reg, static_cast<int>(RegMap[I].CVReg));
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
200 MCSubtargetInfo *X86_MC::createX86MCSubtargetInfo(const Triple &TT,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
201 StringRef CPU, StringRef FS) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 std::string ArchFS = X86_MC::ParseX86Triple(TT);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203 if (!FS.empty()) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
204 if (!ArchFS.empty())
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
205 ArchFS = (Twine(ArchFS) + "," + FS).str();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 else
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 ArchFS = FS;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
208 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210 std::string CPUName = CPU;
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
211 if (CPUName.empty())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
212 CPUName = "generic";
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
213
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
214 return createX86MCSubtargetInfoImpl(TT, CPUName, ArchFS);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
215 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 static MCInstrInfo *createX86MCInstrInfo() {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
218 MCInstrInfo *X = new MCInstrInfo();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219 InitX86MCInstrInfo(X);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 return X;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
221 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
222
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
223 static MCRegisterInfo *createX86MCRegisterInfo(const Triple &TT) {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
224 unsigned RA = (TT.getArch() == Triple::x86_64)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
225 ? X86::RIP // Should have dwarf #16.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
226 : X86::EIP; // Should have dwarf #8.
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
227
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228 MCRegisterInfo *X = new MCRegisterInfo();
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
229 InitX86MCRegisterInfo(X, RA, X86_MC::getDwarfRegFlavour(TT, false),
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
230 X86_MC::getDwarfRegFlavour(TT, true), RA);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
231 X86_MC::initLLVMToSEHAndCVRegMapping(X);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 return X;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
235 static MCAsmInfo *createX86MCAsmInfo(const MCRegisterInfo &MRI,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
236 const Triple &TheTriple) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 bool is64Bit = TheTriple.getArch() == Triple::x86_64;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 MCAsmInfo *MAI;
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
240 if (TheTriple.isOSBinFormatMachO()) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 if (is64Bit)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 MAI = new X86_64MCAsmInfoDarwin(TheTriple);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 else
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 MAI = new X86MCAsmInfoDarwin(TheTriple);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
245 } else if (TheTriple.isOSBinFormatELF()) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 // Force the use of an ELF container.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 MAI = new X86ELFMCAsmInfo(TheTriple);
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
248 } else if (TheTriple.isWindowsMSVCEnvironment() ||
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
249 TheTriple.isWindowsCoreCLREnvironment()) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 MAI = new X86MCAsmInfoMicrosoft(TheTriple);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
251 } else if (TheTriple.isOSCygMing() ||
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
252 TheTriple.isWindowsItaniumEnvironment()) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 MAI = new X86MCAsmInfoGNUCOFF(TheTriple);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254 } else {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 // The default is ELF.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256 MAI = new X86ELFMCAsmInfo(TheTriple);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
258
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
259 // Initialize initial frame state.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 // Calculate amount of bytes used for return address storing
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
261 int stackGrowth = is64Bit ? -8 : -4;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
262
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
263 // Initial state of the frame pointer is esp+stackGrowth.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
264 unsigned StackPtr = is64Bit ? X86::RSP : X86::ESP;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
265 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
266 nullptr, MRI.getDwarfRegNum(StackPtr, true), -stackGrowth);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
267 MAI->addInitialFrameState(Inst);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
268
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
269 // Add return address to move list
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
270 unsigned InstPtr = is64Bit ? X86::RIP : X86::EIP;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
271 MCCFIInstruction Inst2 = MCCFIInstruction::createOffset(
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
272 nullptr, MRI.getDwarfRegNum(InstPtr, true), stackGrowth);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
273 MAI->addInitialFrameState(Inst2);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
274
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
275 return MAI;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
276 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
277
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
278 static MCInstPrinter *createX86MCInstPrinter(const Triple &T,
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
279 unsigned SyntaxVariant,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
280 const MCAsmInfo &MAI,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
281 const MCInstrInfo &MII,
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
282 const MCRegisterInfo &MRI) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
283 if (SyntaxVariant == 0)
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
284 return new X86ATTInstPrinter(MAI, MII, MRI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
285 if (SyntaxVariant == 1)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
286 return new X86IntelInstPrinter(MAI, MII, MRI);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
287 return nullptr;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
288 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
289
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
290 static MCRelocationInfo *createX86MCRelocationInfo(const Triple &TheTriple,
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
291 MCContext &Ctx) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
292 // Default to the stock relocation info.
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
293 return llvm::createMCRelocationInfo(TheTriple, Ctx);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
294 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
295
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
296 static MCInstrAnalysis *createX86MCInstrAnalysis(const MCInstrInfo *Info) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
297 return new MCInstrAnalysis(Info);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
298 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
299
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
300 // Force static initialization.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
301 extern "C" void LLVMInitializeX86TargetMC() {
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
302 for (Target *T : {&getTheX86_32Target(), &getTheX86_64Target()}) {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
303 // Register the MC asm info.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
304 RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
305
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
306 // Register the MC instruction info.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
307 TargetRegistry::RegisterMCInstrInfo(*T, createX86MCInstrInfo);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
308
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
309 // Register the MC register info.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
310 TargetRegistry::RegisterMCRegInfo(*T, createX86MCRegisterInfo);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
311
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
312 // Register the MC subtarget info.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
313 TargetRegistry::RegisterMCSubtargetInfo(*T,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
314 X86_MC::createX86MCSubtargetInfo);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
315
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
316 // Register the MC instruction analyzer.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
317 TargetRegistry::RegisterMCInstrAnalysis(*T, createX86MCInstrAnalysis);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
318
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
319 // Register the code emitter.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
320 TargetRegistry::RegisterMCCodeEmitter(*T, createX86MCCodeEmitter);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
321
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
322 // Register the obj target streamer.
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
323 TargetRegistry::RegisterObjectTargetStreamer(*T,
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
324 createX86ObjectTargetStreamer);
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
325
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
326 // Register the asm target streamer.
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
327 TargetRegistry::RegisterAsmTargetStreamer(*T, createX86AsmTargetStreamer);
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
328
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
329 TargetRegistry::RegisterCOFFStreamer(*T, createX86WinCOFFStreamer);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
330
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
331 // Register the MCInstPrinter.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
332 TargetRegistry::RegisterMCInstPrinter(*T, createX86MCInstPrinter);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
333
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
334 // Register the MC relocation info.
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
335 TargetRegistry::RegisterMCRelocationInfo(*T, createX86MCRelocationInfo);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
336 }
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
337
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
338 // Register the asm backend.
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
339 TargetRegistry::RegisterMCAsmBackend(getTheX86_32Target(),
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
340 createX86_32AsmBackend);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
341 TargetRegistry::RegisterMCAsmBackend(getTheX86_64Target(),
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
342 createX86_64AsmBackend);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
343 }
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
344
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
345 unsigned llvm::getX86SubSuperRegisterOrZero(unsigned Reg, unsigned Size,
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
346 bool High) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
347 switch (Size) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
348 default: return 0;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
349 case 8:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
350 if (High) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
351 switch (Reg) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
352 default: return getX86SubSuperRegisterOrZero(Reg, 64);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
353 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
354 return X86::SI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
355 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
356 return X86::DI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
357 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
358 return X86::BP;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
359 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
360 return X86::SP;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
361 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
362 return X86::AH;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
363 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
364 return X86::DH;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
365 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
366 return X86::CH;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
367 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
368 return X86::BH;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
369 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
370 } else {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
371 switch (Reg) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
372 default: return 0;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
373 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
374 return X86::AL;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
375 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
376 return X86::DL;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
377 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
378 return X86::CL;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
379 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
380 return X86::BL;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
381 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
382 return X86::SIL;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
383 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
384 return X86::DIL;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
385 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
386 return X86::BPL;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
387 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
388 return X86::SPL;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
389 case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
390 return X86::R8B;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
391 case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
392 return X86::R9B;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
393 case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
394 return X86::R10B;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
395 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
396 return X86::R11B;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
397 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
398 return X86::R12B;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
399 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
400 return X86::R13B;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
401 case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
402 return X86::R14B;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
403 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
404 return X86::R15B;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
405 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
406 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
407 case 16:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
408 switch (Reg) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
409 default: return 0;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
410 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
411 return X86::AX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
412 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
413 return X86::DX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
414 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
415 return X86::CX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
416 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
417 return X86::BX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
418 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
419 return X86::SI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
420 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
421 return X86::DI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
422 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
423 return X86::BP;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
424 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
425 return X86::SP;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
426 case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
427 return X86::R8W;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
428 case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
429 return X86::R9W;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
430 case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
431 return X86::R10W;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
432 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
433 return X86::R11W;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
434 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
435 return X86::R12W;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
436 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
437 return X86::R13W;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
438 case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
439 return X86::R14W;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
440 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
441 return X86::R15W;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
442 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
443 case 32:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
444 switch (Reg) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
445 default: return 0;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
446 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
447 return X86::EAX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
448 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
449 return X86::EDX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
450 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
451 return X86::ECX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
452 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
453 return X86::EBX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
454 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
455 return X86::ESI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
456 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
457 return X86::EDI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
458 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
459 return X86::EBP;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
460 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
461 return X86::ESP;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
462 case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
463 return X86::R8D;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
464 case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
465 return X86::R9D;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
466 case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
467 return X86::R10D;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
468 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
469 return X86::R11D;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
470 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
471 return X86::R12D;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
472 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
473 return X86::R13D;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
474 case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
475 return X86::R14D;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
476 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
477 return X86::R15D;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
478 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
479 case 64:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
480 switch (Reg) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
481 default: return 0;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
482 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
483 return X86::RAX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
484 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
485 return X86::RDX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
486 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
487 return X86::RCX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
488 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
489 return X86::RBX;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
490 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
491 return X86::RSI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
492 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
493 return X86::RDI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
494 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
495 return X86::RBP;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
496 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
497 return X86::RSP;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
498 case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
499 return X86::R8;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
500 case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
501 return X86::R9;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
502 case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
503 return X86::R10;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
504 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
505 return X86::R11;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
506 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
507 return X86::R12;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
508 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
509 return X86::R13;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
510 case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
511 return X86::R14;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
512 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15:
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
513 return X86::R15;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
514 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
515 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
516 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
517
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
518 unsigned llvm::getX86SubSuperRegister(unsigned Reg, unsigned Size, bool High) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
519 unsigned Res = getX86SubSuperRegisterOrZero(Reg, Size, High);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
520 assert(Res != 0 && "Unexpected register or VT");
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
521 return Res;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
522 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
523
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
524