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1 /*===---- f16cintrin.h - F16C intrinsics -----------------------------------===
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2 *
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3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 * See https://llvm.org/LICENSE.txt for license information.
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5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 *
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7 *===-----------------------------------------------------------------------===
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8 */
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9
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10 #if !defined __IMMINTRIN_H
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11 #error "Never use <f16cintrin.h> directly; include <immintrin.h> instead."
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12 #endif
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13
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14 #ifndef __F16CINTRIN_H
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15 #define __F16CINTRIN_H
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16
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17 /* Define the default attributes for the functions in this file. */
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18 #define __DEFAULT_FN_ATTRS128 \
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19 __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(128)))
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20 #define __DEFAULT_FN_ATTRS256 \
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21 __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(256)))
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22
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23 /* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,
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24 * but that's because icc can emulate these without f16c using a library call.
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25 * Since we don't do that let's leave these in f16cintrin.h.
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26 */
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27
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28 /// Converts a 16-bit half-precision float value into a 32-bit float
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29 /// value.
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30 ///
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31 /// \headerfile <x86intrin.h>
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32 ///
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33 /// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
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34 ///
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35 /// \param __a
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36 /// A 16-bit half-precision float value.
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37 /// \returns The converted 32-bit float value.
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38 static __inline float __DEFAULT_FN_ATTRS128
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39 _cvtsh_ss(unsigned short __a)
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40 {
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41 __v8hi __v = {(short)__a, 0, 0, 0, 0, 0, 0, 0};
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42 __v4sf __r = __builtin_ia32_vcvtph2ps(__v);
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43 return __r[0];
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44 }
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45
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46 /// Converts a 32-bit single-precision float value to a 16-bit
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47 /// half-precision float value.
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48 ///
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49 /// \headerfile <x86intrin.h>
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50 ///
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51 /// \code
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52 /// unsigned short _cvtss_sh(float a, const int imm);
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53 /// \endcode
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54 ///
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55 /// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
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56 ///
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57 /// \param a
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58 /// A 32-bit single-precision float value to be converted to a 16-bit
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59 /// half-precision float value.
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60 /// \param imm
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61 /// An immediate value controlling rounding using bits [2:0]: \n
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62 /// 000: Nearest \n
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63 /// 001: Down \n
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64 /// 010: Up \n
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65 /// 011: Truncate \n
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66 /// 1XX: Use MXCSR.RC for rounding
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67 /// \returns The converted 16-bit half-precision float value.
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68 #define _cvtss_sh(a, imm) \
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69 (unsigned short)(((__v8hi)__builtin_ia32_vcvtps2ph((__v4sf){a, 0, 0, 0}, \
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70 (imm)))[0])
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71
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72 /// Converts a 128-bit vector containing 32-bit float values into a
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73 /// 128-bit vector containing 16-bit half-precision float values.
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74 ///
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75 /// \headerfile <x86intrin.h>
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76 ///
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77 /// \code
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78 /// __m128i _mm_cvtps_ph(__m128 a, const int imm);
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79 /// \endcode
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80 ///
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81 /// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
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82 ///
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83 /// \param a
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84 /// A 128-bit vector containing 32-bit float values.
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85 /// \param imm
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86 /// An immediate value controlling rounding using bits [2:0]: \n
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87 /// 000: Nearest \n
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88 /// 001: Down \n
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89 /// 010: Up \n
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90 /// 011: Truncate \n
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91 /// 1XX: Use MXCSR.RC for rounding
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92 /// \returns A 128-bit vector containing converted 16-bit half-precision float
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93 /// values. The lower 64 bits are used to store the converted 16-bit
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94 /// half-precision floating-point values.
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95 #define _mm_cvtps_ph(a, imm) \
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96 (__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm))
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97
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98 /// Converts a 128-bit vector containing 16-bit half-precision float
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99 /// values into a 128-bit vector containing 32-bit float values.
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100 ///
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101 /// \headerfile <x86intrin.h>
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102 ///
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103 /// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
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104 ///
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105 /// \param __a
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106 /// A 128-bit vector containing 16-bit half-precision float values. The lower
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107 /// 64 bits are used in the conversion.
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108 /// \returns A 128-bit vector of [4 x float] containing converted float values.
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109 static __inline __m128 __DEFAULT_FN_ATTRS128
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110 _mm_cvtph_ps(__m128i __a)
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111 {
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112 return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a);
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113 }
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114
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115 /// Converts a 256-bit vector of [8 x float] into a 128-bit vector
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116 /// containing 16-bit half-precision float values.
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117 ///
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118 /// \headerfile <x86intrin.h>
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119 ///
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120 /// \code
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121 /// __m128i _mm256_cvtps_ph(__m256 a, const int imm);
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122 /// \endcode
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123 ///
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124 /// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
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125 ///
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126 /// \param a
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127 /// A 256-bit vector containing 32-bit single-precision float values to be
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128 /// converted to 16-bit half-precision float values.
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129 /// \param imm
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130 /// An immediate value controlling rounding using bits [2:0]: \n
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131 /// 000: Nearest \n
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132 /// 001: Down \n
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133 /// 010: Up \n
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134 /// 011: Truncate \n
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135 /// 1XX: Use MXCSR.RC for rounding
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136 /// \returns A 128-bit vector containing the converted 16-bit half-precision
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137 /// float values.
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138 #define _mm256_cvtps_ph(a, imm) \
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139 (__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm))
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140
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141 /// Converts a 128-bit vector containing 16-bit half-precision float
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142 /// values into a 256-bit vector of [8 x float].
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143 ///
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144 /// \headerfile <x86intrin.h>
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145 ///
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146 /// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
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147 ///
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148 /// \param __a
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149 /// A 128-bit vector containing 16-bit half-precision float values to be
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150 /// converted to 32-bit single-precision float values.
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151 /// \returns A vector of [8 x float] containing the converted 32-bit
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152 /// single-precision float values.
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153 static __inline __m256 __DEFAULT_FN_ATTRS256
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154 _mm256_cvtph_ps(__m128i __a)
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155 {
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156 return (__m256)__builtin_ia32_vcvtph2ps256((__v8hi)__a);
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157 }
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158
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159 #undef __DEFAULT_FN_ATTRS128
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160 #undef __DEFAULT_FN_ATTRS256
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161
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162 #endif /* __F16CINTRIN_H */
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