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annotate clang/lib/Headers/fma4intrin.h @ 176:de4ac79aef9d

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author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 25 May 2020 17:13:11 +0900
parents 1d019706d866
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*===---- fma4intrin.h - FMA4 intrinsics -----------------------------------===
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2 *
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3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 * See https://llvm.org/LICENSE.txt for license information.
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5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 *
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7 *===-----------------------------------------------------------------------===
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8 */
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9
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10 #ifndef __X86INTRIN_H
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11 #error "Never use <fma4intrin.h> directly; include <x86intrin.h> instead."
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12 #endif
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13
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14 #ifndef __FMA4INTRIN_H
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15 #define __FMA4INTRIN_H
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16
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17 #include <pmmintrin.h>
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18
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19 /* Define the default attributes for the functions in this file. */
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20 #define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(128)))
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21 #define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(256)))
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22
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23 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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24 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
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25 {
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26 return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
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27 }
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28
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29 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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30 _mm_macc_pd(__m128d __A, __m128d __B, __m128d __C)
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31 {
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32 return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C);
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33 }
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34
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35 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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36 _mm_macc_ss(__m128 __A, __m128 __B, __m128 __C)
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37 {
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38 return (__m128)__builtin_ia32_vfmaddss((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
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39 }
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40
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41 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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42 _mm_macc_sd(__m128d __A, __m128d __B, __m128d __C)
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43 {
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44 return (__m128d)__builtin_ia32_vfmaddsd((__v2df)__A, (__v2df)__B, (__v2df)__C);
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45 }
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46
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47 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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48 _mm_msub_ps(__m128 __A, __m128 __B, __m128 __C)
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49 {
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50 return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);
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51 }
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52
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53 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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54 _mm_msub_pd(__m128d __A, __m128d __B, __m128d __C)
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55 {
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56 return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, -(__v2df)__C);
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57 }
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58
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59 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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60 _mm_msub_ss(__m128 __A, __m128 __B, __m128 __C)
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61 {
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62 return (__m128)__builtin_ia32_vfmaddss((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);
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63 }
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64
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65 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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66 _mm_msub_sd(__m128d __A, __m128d __B, __m128d __C)
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67 {
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68 return (__m128d)__builtin_ia32_vfmaddsd((__v2df)__A, (__v2df)__B, -(__v2df)__C);
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69 }
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70
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71 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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72 _mm_nmacc_ps(__m128 __A, __m128 __B, __m128 __C)
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73 {
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74 return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
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75 }
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76
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77 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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78 _mm_nmacc_pd(__m128d __A, __m128d __B, __m128d __C)
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79 {
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80 return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, (__v2df)__C);
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81 }
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82
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83 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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84 _mm_nmacc_ss(__m128 __A, __m128 __B, __m128 __C)
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85 {
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86 return (__m128)__builtin_ia32_vfmaddss(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
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87 }
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88
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89 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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90 _mm_nmacc_sd(__m128d __A, __m128d __B, __m128d __C)
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91 {
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92 return (__m128d)__builtin_ia32_vfmaddsd(-(__v2df)__A, (__v2df)__B, (__v2df)__C);
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93 }
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94
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95 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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96 _mm_nmsub_ps(__m128 __A, __m128 __B, __m128 __C)
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97 {
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98 return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);
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99 }
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100
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101 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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102 _mm_nmsub_pd(__m128d __A, __m128d __B, __m128d __C)
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103 {
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104 return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C);
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105 }
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106
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107 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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108 _mm_nmsub_ss(__m128 __A, __m128 __B, __m128 __C)
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109 {
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110 return (__m128)__builtin_ia32_vfmaddss(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);
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111 }
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112
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113 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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114 _mm_nmsub_sd(__m128d __A, __m128d __B, __m128d __C)
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115 {
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116 return (__m128d)__builtin_ia32_vfmaddsd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C);
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117 }
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118
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119 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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120 _mm_maddsub_ps(__m128 __A, __m128 __B, __m128 __C)
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121 {
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122 return (__m128)__builtin_ia32_vfmaddsubps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
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123 }
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124
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125 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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126 _mm_maddsub_pd(__m128d __A, __m128d __B, __m128d __C)
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127 {
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128 return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, (__v2df)__C);
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129 }
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130
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131 static __inline__ __m128 __DEFAULT_FN_ATTRS128
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132 _mm_msubadd_ps(__m128 __A, __m128 __B, __m128 __C)
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133 {
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134 return (__m128)__builtin_ia32_vfmaddsubps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);
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135 }
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136
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137 static __inline__ __m128d __DEFAULT_FN_ATTRS128
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138 _mm_msubadd_pd(__m128d __A, __m128d __B, __m128d __C)
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139 {
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140 return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, -(__v2df)__C);
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141 }
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142
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143 static __inline__ __m256 __DEFAULT_FN_ATTRS256
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144 _mm256_macc_ps(__m256 __A, __m256 __B, __m256 __C)
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145 {
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146 return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);
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147 }
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148
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149 static __inline__ __m256d __DEFAULT_FN_ATTRS256
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150 _mm256_macc_pd(__m256d __A, __m256d __B, __m256d __C)
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151 {
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152 return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);
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153 }
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154
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155 static __inline__ __m256 __DEFAULT_FN_ATTRS256
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156 _mm256_msub_ps(__m256 __A, __m256 __B, __m256 __C)
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157 {
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158 return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C);
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159 }
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160
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161 static __inline__ __m256d __DEFAULT_FN_ATTRS256
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162 _mm256_msub_pd(__m256d __A, __m256d __B, __m256d __C)
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163 {
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164 return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C);
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165 }
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166
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167 static __inline__ __m256 __DEFAULT_FN_ATTRS256
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168 _mm256_nmacc_ps(__m256 __A, __m256 __B, __m256 __C)
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169 {
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170 return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C);
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171 }
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172
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173 static __inline__ __m256d __DEFAULT_FN_ATTRS256
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174 _mm256_nmacc_pd(__m256d __A, __m256d __B, __m256d __C)
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175 {
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176 return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, (__v4df)__C);
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177 }
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178
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179 static __inline__ __m256 __DEFAULT_FN_ATTRS256
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180 _mm256_nmsub_ps(__m256 __A, __m256 __B, __m256 __C)
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181 {
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182 return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C);
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183 }
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184
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185 static __inline__ __m256d __DEFAULT_FN_ATTRS256
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186 _mm256_nmsub_pd(__m256d __A, __m256d __B, __m256d __C)
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187 {
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188 return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, -(__v4df)__C);
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189 }
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190
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191 static __inline__ __m256 __DEFAULT_FN_ATTRS256
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192 _mm256_maddsub_ps(__m256 __A, __m256 __B, __m256 __C)
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193 {
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194 return (__m256)__builtin_ia32_vfmaddsubps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);
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195 }
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196
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197 static __inline__ __m256d __DEFAULT_FN_ATTRS256
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198 _mm256_maddsub_pd(__m256d __A, __m256d __B, __m256d __C)
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199 {
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200 return (__m256d)__builtin_ia32_vfmaddsubpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);
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201 }
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202
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203 static __inline__ __m256 __DEFAULT_FN_ATTRS256
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204 _mm256_msubadd_ps(__m256 __A, __m256 __B, __m256 __C)
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205 {
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206 return (__m256)__builtin_ia32_vfmaddsubps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C);
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207 }
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208
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209 static __inline__ __m256d __DEFAULT_FN_ATTRS256
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210 _mm256_msubadd_pd(__m256d __A, __m256d __B, __m256d __C)
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211 {
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212 return (__m256d)__builtin_ia32_vfmaddsubpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C);
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213 }
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214
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215 #undef __DEFAULT_FN_ATTRS128
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216 #undef __DEFAULT_FN_ATTRS256
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217
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218 #endif /* __FMA4INTRIN_H */