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150
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1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
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2 //
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3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 // See https://llvm.org/LICENSE.txt for license information.
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5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 //
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7 //===----------------------------------------------------------------------===//
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8 //
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9 // This file implements a target parser to recognise ARM hardware features
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10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #include "llvm/Support/ARMTargetParser.h"
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15 #include "llvm/ADT/StringSwitch.h"
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173
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16 #include "llvm/ADT/Triple.h"
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150
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17 #include <cctype>
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18
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19 using namespace llvm;
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20
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21 static StringRef getHWDivSynonym(StringRef HWDiv) {
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22 return StringSwitch<StringRef>(HWDiv)
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23 .Case("thumb,arm", "arm,thumb")
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24 .Default(HWDiv);
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25 }
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26
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27 // Allows partial match, ex. "v7a" matches "armv7a".
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28 ARM::ArchKind ARM::parseArch(StringRef Arch) {
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29 Arch = getCanonicalArchName(Arch);
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30 StringRef Syn = getArchSynonym(Arch);
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31 for (const auto &A : ARCHNames) {
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32 if (A.getName().endswith(Syn))
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33 return A.ID;
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34 }
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35 return ArchKind::INVALID;
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36 }
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37
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38 // Version number (ex. v7 = 7).
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39 unsigned ARM::parseArchVersion(StringRef Arch) {
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40 Arch = getCanonicalArchName(Arch);
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41 switch (parseArch(Arch)) {
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42 case ArchKind::ARMV2:
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43 case ArchKind::ARMV2A:
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44 return 2;
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45 case ArchKind::ARMV3:
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46 case ArchKind::ARMV3M:
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47 return 3;
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48 case ArchKind::ARMV4:
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49 case ArchKind::ARMV4T:
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50 return 4;
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51 case ArchKind::ARMV5T:
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52 case ArchKind::ARMV5TE:
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53 case ArchKind::IWMMXT:
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54 case ArchKind::IWMMXT2:
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55 case ArchKind::XSCALE:
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56 case ArchKind::ARMV5TEJ:
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57 return 5;
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58 case ArchKind::ARMV6:
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59 case ArchKind::ARMV6K:
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60 case ArchKind::ARMV6T2:
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61 case ArchKind::ARMV6KZ:
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62 case ArchKind::ARMV6M:
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63 return 6;
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64 case ArchKind::ARMV7A:
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65 case ArchKind::ARMV7VE:
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66 case ArchKind::ARMV7R:
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67 case ArchKind::ARMV7M:
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68 case ArchKind::ARMV7S:
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69 case ArchKind::ARMV7EM:
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70 case ArchKind::ARMV7K:
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71 return 7;
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72 case ArchKind::ARMV8A:
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73 case ArchKind::ARMV8_1A:
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74 case ArchKind::ARMV8_2A:
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75 case ArchKind::ARMV8_3A:
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76 case ArchKind::ARMV8_4A:
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77 case ArchKind::ARMV8_5A:
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173
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78 case ArchKind::ARMV8_6A:
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150
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79 case ArchKind::ARMV8R:
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80 case ArchKind::ARMV8MBaseline:
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81 case ArchKind::ARMV8MMainline:
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82 case ArchKind::ARMV8_1MMainline:
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83 return 8;
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84 case ArchKind::INVALID:
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85 return 0;
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86 }
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87 llvm_unreachable("Unhandled architecture");
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88 }
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89
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90 // Profile A/R/M
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91 ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
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92 Arch = getCanonicalArchName(Arch);
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93 switch (parseArch(Arch)) {
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94 case ArchKind::ARMV6M:
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95 case ArchKind::ARMV7M:
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96 case ArchKind::ARMV7EM:
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97 case ArchKind::ARMV8MMainline:
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98 case ArchKind::ARMV8MBaseline:
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99 case ArchKind::ARMV8_1MMainline:
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100 return ProfileKind::M;
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101 case ArchKind::ARMV7R:
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102 case ArchKind::ARMV8R:
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103 return ProfileKind::R;
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104 case ArchKind::ARMV7A:
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105 case ArchKind::ARMV7VE:
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106 case ArchKind::ARMV7K:
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107 case ArchKind::ARMV8A:
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108 case ArchKind::ARMV8_1A:
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109 case ArchKind::ARMV8_2A:
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110 case ArchKind::ARMV8_3A:
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111 case ArchKind::ARMV8_4A:
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112 case ArchKind::ARMV8_5A:
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173
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113 case ArchKind::ARMV8_6A:
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150
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114 return ProfileKind::A;
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115 case ArchKind::ARMV2:
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116 case ArchKind::ARMV2A:
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117 case ArchKind::ARMV3:
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118 case ArchKind::ARMV3M:
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119 case ArchKind::ARMV4:
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120 case ArchKind::ARMV4T:
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121 case ArchKind::ARMV5T:
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122 case ArchKind::ARMV5TE:
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123 case ArchKind::ARMV5TEJ:
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124 case ArchKind::ARMV6:
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125 case ArchKind::ARMV6K:
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126 case ArchKind::ARMV6T2:
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127 case ArchKind::ARMV6KZ:
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128 case ArchKind::ARMV7S:
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129 case ArchKind::IWMMXT:
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130 case ArchKind::IWMMXT2:
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131 case ArchKind::XSCALE:
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132 case ArchKind::INVALID:
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133 return ProfileKind::INVALID;
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134 }
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135 llvm_unreachable("Unhandled architecture");
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136 }
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137
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138 StringRef ARM::getArchSynonym(StringRef Arch) {
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139 return StringSwitch<StringRef>(Arch)
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140 .Case("v5", "v5t")
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141 .Case("v5e", "v5te")
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142 .Case("v6j", "v6")
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143 .Case("v6hl", "v6k")
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144 .Cases("v6m", "v6sm", "v6s-m", "v6-m")
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145 .Cases("v6z", "v6zk", "v6kz")
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146 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
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147 .Case("v7r", "v7-r")
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148 .Case("v7m", "v7-m")
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149 .Case("v7em", "v7e-m")
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150 .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a")
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151 .Case("v8.1a", "v8.1-a")
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152 .Case("v8.2a", "v8.2-a")
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153 .Case("v8.3a", "v8.3-a")
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154 .Case("v8.4a", "v8.4-a")
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155 .Case("v8.5a", "v8.5-a")
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173
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156 .Case("v8.6a", "v8.6-a")
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150
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157 .Case("v8r", "v8-r")
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158 .Case("v8m.base", "v8-m.base")
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159 .Case("v8m.main", "v8-m.main")
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160 .Case("v8.1m.main", "v8.1-m.main")
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161 .Default(Arch);
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162 }
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163
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164 bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) {
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165
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166 if (FPUKind >= FK_LAST || FPUKind == FK_INVALID)
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167 return false;
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168
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169 static const struct FPUFeatureNameInfo {
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170 const char *PlusName, *MinusName;
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171 FPUVersion MinVersion;
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172 FPURestriction MaxRestriction;
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173 } FPUFeatureInfoList[] = {
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174 // We have to specify the + and - versions of the name in full so
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175 // that we can return them as static StringRefs.
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176 //
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177 // Also, the SubtargetFeatures ending in just "sp" are listed here
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178 // under FPURestriction::None, which is the only FPURestriction in
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179 // which they would be valid (since FPURestriction::SP doesn't
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180 // exist).
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181 {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
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182 {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
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183 {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},
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184 {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
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185 {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
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186 {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},
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187 {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
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188 {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None},
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189 {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
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190 {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
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191 {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},
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192 {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},
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193 {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
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194 {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
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195 {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},
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196 {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
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197 {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16},
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198 {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None},
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199 };
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200
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201 for (const auto &Info: FPUFeatureInfoList) {
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202 if (FPUNames[FPUKind].FPUVer >= Info.MinVersion &&
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203 FPUNames[FPUKind].Restriction <= Info.MaxRestriction)
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204 Features.push_back(Info.PlusName);
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205 else
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206 Features.push_back(Info.MinusName);
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207 }
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208
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209 static const struct NeonFeatureNameInfo {
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210 const char *PlusName, *MinusName;
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211 NeonSupportLevel MinSupportLevel;
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212 } NeonFeatureInfoList[] = {
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213 {"+neon", "-neon", NeonSupportLevel::Neon},
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214 {"+crypto", "-crypto", NeonSupportLevel::Crypto},
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215 };
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216
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217 for (const auto &Info: NeonFeatureInfoList) {
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218 if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)
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219 Features.push_back(Info.PlusName);
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220 else
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221 Features.push_back(Info.MinusName);
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222 }
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223
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224 return true;
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225 }
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226
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227 // Little/Big endian
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228 ARM::EndianKind ARM::parseArchEndian(StringRef Arch) {
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229 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
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230 Arch.startswith("aarch64_be"))
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231 return EndianKind::BIG;
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232
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233 if (Arch.startswith("arm") || Arch.startswith("thumb")) {
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234 if (Arch.endswith("eb"))
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235 return EndianKind::BIG;
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236 else
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237 return EndianKind::LITTLE;
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238 }
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239
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240 if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32"))
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241 return EndianKind::LITTLE;
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242
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243 return EndianKind::INVALID;
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244 }
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245
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246 // ARM, Thumb, AArch64
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247 ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
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248 return StringSwitch<ISAKind>(Arch)
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249 .StartsWith("aarch64", ISAKind::AARCH64)
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250 .StartsWith("arm64", ISAKind::AARCH64)
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251 .StartsWith("thumb", ISAKind::THUMB)
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252 .StartsWith("arm", ISAKind::ARM)
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253 .Default(ISAKind::INVALID);
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254 }
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255
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256 unsigned ARM::parseFPU(StringRef FPU) {
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257 StringRef Syn = getFPUSynonym(FPU);
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258 for (const auto F : FPUNames) {
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259 if (Syn == F.getName())
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260 return F.ID;
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261 }
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262 return FK_INVALID;
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263 }
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264
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265 ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
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266 if (FPUKind >= FK_LAST)
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267 return NeonSupportLevel::None;
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268 return FPUNames[FPUKind].NeonSupport;
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269 }
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270
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271 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
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272 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
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273 // "v.+", if the latter, return unmodified string, minus 'eb'.
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274 // If invalid, return empty string.
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275 StringRef ARM::getCanonicalArchName(StringRef Arch) {
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276 size_t offset = StringRef::npos;
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277 StringRef A = Arch;
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278 StringRef Error = "";
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279
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280 // Begins with "arm" / "thumb", move past it.
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281 if (A.startswith("arm64_32"))
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282 offset = 8;
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283 else if (A.startswith("arm64"))
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284 offset = 5;
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285 else if (A.startswith("aarch64_32"))
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286 offset = 10;
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287 else if (A.startswith("arm"))
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288 offset = 3;
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289 else if (A.startswith("thumb"))
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290 offset = 5;
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291 else if (A.startswith("aarch64")) {
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292 offset = 7;
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293 // AArch64 uses "_be", not "eb" suffix.
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294 if (A.find("eb") != StringRef::npos)
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295 return Error;
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296 if (A.substr(offset, 3) == "_be")
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297 offset += 3;
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298 }
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299
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300 // Ex. "armebv7", move past the "eb".
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301 if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
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302 offset += 2;
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303 // Or, if it ends with eb ("armv7eb"), chop it off.
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304 else if (A.endswith("eb"))
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305 A = A.substr(0, A.size() - 2);
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306 // Trim the head
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307 if (offset != StringRef::npos)
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308 A = A.substr(offset);
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309
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310 // Empty string means offset reached the end, which means it's valid.
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311 if (A.empty())
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312 return Arch;
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313
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314 // Only match non-marketing names
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315 if (offset != StringRef::npos) {
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316 // Must start with 'vN'.
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317 if (A.size() >= 2 && (A[0] != 'v' || !std::isdigit(A[1])))
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318 return Error;
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319 // Can't have an extra 'eb'.
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320 if (A.find("eb") != StringRef::npos)
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321 return Error;
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322 }
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323
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324 // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
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325 return A;
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326 }
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327
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328 StringRef ARM::getFPUSynonym(StringRef FPU) {
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329 return StringSwitch<StringRef>(FPU)
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330 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
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331 .Case("vfp2", "vfpv2")
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332 .Case("vfp3", "vfpv3")
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333 .Case("vfp4", "vfpv4")
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334 .Case("vfp3-d16", "vfpv3-d16")
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335 .Case("vfp4-d16", "vfpv4-d16")
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336 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
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337 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
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338 .Case("fp5-sp-d16", "fpv5-sp-d16")
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339 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
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340 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
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341 .Case("neon-vfpv3", "neon")
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342 .Default(FPU);
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343 }
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344
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345 StringRef ARM::getFPUName(unsigned FPUKind) {
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346 if (FPUKind >= FK_LAST)
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347 return StringRef();
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348 return FPUNames[FPUKind].getName();
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349 }
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350
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351 ARM::FPUVersion ARM::getFPUVersion(unsigned FPUKind) {
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352 if (FPUKind >= FK_LAST)
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353 return FPUVersion::NONE;
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354 return FPUNames[FPUKind].FPUVer;
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355 }
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356
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357 ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) {
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358 if (FPUKind >= FK_LAST)
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359 return FPURestriction::None;
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360 return FPUNames[FPUKind].Restriction;
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361 }
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362
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363 unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
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364 if (CPU == "generic")
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365 return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
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366
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367 return StringSwitch<unsigned>(CPU)
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368 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
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369 .Case(NAME, DEFAULT_FPU)
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370 #include "llvm/Support/ARMTargetParser.def"
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371 .Default(ARM::FK_INVALID);
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372 }
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373
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374 uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
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375 if (CPU == "generic")
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376 return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
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377
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378 return StringSwitch<uint64_t>(CPU)
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379 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
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380 .Case(NAME, \
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381 ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
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382 DEFAULT_EXT)
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383 #include "llvm/Support/ARMTargetParser.def"
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384 .Default(ARM::AEK_INVALID);
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385 }
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386
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387 bool ARM::getHWDivFeatures(uint64_t HWDivKind,
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388 std::vector<StringRef> &Features) {
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389
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390 if (HWDivKind == AEK_INVALID)
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391 return false;
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392
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393 if (HWDivKind & AEK_HWDIVARM)
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394 Features.push_back("+hwdiv-arm");
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395 else
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396 Features.push_back("-hwdiv-arm");
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397
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398 if (HWDivKind & AEK_HWDIVTHUMB)
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399 Features.push_back("+hwdiv");
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400 else
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401 Features.push_back("-hwdiv");
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402
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403 return true;
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404 }
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405
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406 bool ARM::getExtensionFeatures(uint64_t Extensions,
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407 std::vector<StringRef> &Features) {
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408
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409 if (Extensions == AEK_INVALID)
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410 return false;
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411
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412 for (const auto AE : ARCHExtNames) {
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413 if ((Extensions & AE.ID) == AE.ID && AE.Feature)
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414 Features.push_back(AE.Feature);
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415 else if (AE.NegFeature)
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416 Features.push_back(AE.NegFeature);
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417 }
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418
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419 return getHWDivFeatures(Extensions, Features);
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420 }
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421
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422 StringRef ARM::getArchName(ARM::ArchKind AK) {
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423 return ARCHNames[static_cast<unsigned>(AK)].getName();
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424 }
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425
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426 StringRef ARM::getCPUAttr(ARM::ArchKind AK) {
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427 return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
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428 }
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429
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430 StringRef ARM::getSubArch(ARM::ArchKind AK) {
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431 return ARCHNames[static_cast<unsigned>(AK)].getSubArch();
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432 }
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433
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434 unsigned ARM::getArchAttr(ARM::ArchKind AK) {
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435 return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
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436 }
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437
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438 StringRef ARM::getArchExtName(uint64_t ArchExtKind) {
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439 for (const auto AE : ARCHExtNames) {
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440 if (ArchExtKind == AE.ID)
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441 return AE.getName();
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442 }
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443 return StringRef();
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444 }
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445
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446 static bool stripNegationPrefix(StringRef &Name) {
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447 if (Name.startswith("no")) {
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448 Name = Name.substr(2);
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449 return true;
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450 }
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451 return false;
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452 }
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453
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454 StringRef ARM::getArchExtFeature(StringRef ArchExt) {
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455 bool Negated = stripNegationPrefix(ArchExt);
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456 for (const auto AE : ARCHExtNames) {
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457 if (AE.Feature && ArchExt == AE.getName())
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458 return StringRef(Negated ? AE.NegFeature : AE.Feature);
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459 }
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460
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461 return StringRef();
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462 }
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463
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464 static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) {
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465 const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];
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466
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467 // If the input FPU already supports double-precision, then there
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468 // isn't any different FPU we can return here.
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469 //
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470 // The current available FPURestriction values are None (no
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471 // restriction), D16 (only 16 d-regs) and SP_D16 (16 d-regs
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472 // and single precision only); there's no value representing
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473 // SP restriction without D16. So this test just means 'is it
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|
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474 // SP only?'.
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475 if (InputFPU.Restriction != ARM::FPURestriction::SP_D16)
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476 return ARM::FK_INVALID;
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|
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477
|
|
|
478 // Otherwise, look for an FPU entry with all the same fields, except
|
|
|
479 // that SP_D16 has been replaced with just D16, representing adding
|
|
|
480 // double precision and not changing anything else.
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481 for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {
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482 if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
|
|
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483 CandidateFPU.NeonSupport == InputFPU.NeonSupport &&
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|
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484 CandidateFPU.Restriction == ARM::FPURestriction::D16) {
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|
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485 return CandidateFPU.ID;
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|
486 }
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|
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487 }
|
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488
|
|
|
489 // nothing found
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|
|
490 return ARM::FK_INVALID;
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|
|
491 }
|
|
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492
|
|
|
493 bool ARM::appendArchExtFeatures(
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|
|
494 StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
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|
|
495 std::vector<StringRef> &Features) {
|
|
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496
|
|
|
497 size_t StartingNumFeatures = Features.size();
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|
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498 const bool Negated = stripNegationPrefix(ArchExt);
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|
|
499 uint64_t ID = parseArchExt(ArchExt);
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|
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500
|
|
|
501 if (ID == AEK_INVALID)
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|
|
502 return false;
|
|
|
503
|
|
|
504 for (const auto AE : ARCHExtNames) {
|
|
|
505 if (Negated) {
|
|
|
506 if ((AE.ID & ID) == ID && AE.NegFeature)
|
|
|
507 Features.push_back(AE.NegFeature);
|
|
|
508 } else {
|
|
|
509 if ((AE.ID & ID) == AE.ID && AE.Feature)
|
|
|
510 Features.push_back(AE.Feature);
|
|
|
511 }
|
|
|
512 }
|
|
|
513
|
|
|
514 if (CPU == "")
|
|
|
515 CPU = "generic";
|
|
|
516
|
|
|
517 if (ArchExt == "fp" || ArchExt == "fp.dp") {
|
|
|
518 unsigned FPUKind;
|
|
|
519 if (ArchExt == "fp.dp") {
|
|
|
520 if (Negated) {
|
|
|
521 Features.push_back("-fp64");
|
|
|
522 return true;
|
|
|
523 }
|
|
|
524 FPUKind = findDoublePrecisionFPU(getDefaultFPU(CPU, AK));
|
|
|
525 } else if (Negated) {
|
|
|
526 FPUKind = ARM::FK_NONE;
|
|
|
527 } else {
|
|
|
528 FPUKind = getDefaultFPU(CPU, AK);
|
|
|
529 }
|
|
|
530 return ARM::getFPUFeatures(FPUKind, Features);
|
|
|
531 }
|
|
|
532 return StartingNumFeatures != Features.size();
|
|
|
533 }
|
|
|
534
|
|
|
535 StringRef ARM::getHWDivName(uint64_t HWDivKind) {
|
|
|
536 for (const auto D : HWDivNames) {
|
|
|
537 if (HWDivKind == D.ID)
|
|
|
538 return D.getName();
|
|
|
539 }
|
|
|
540 return StringRef();
|
|
|
541 }
|
|
|
542
|
|
|
543 StringRef ARM::getDefaultCPU(StringRef Arch) {
|
|
|
544 ArchKind AK = parseArch(Arch);
|
|
|
545 if (AK == ArchKind::INVALID)
|
|
|
546 return StringRef();
|
|
|
547
|
|
|
548 // Look for multiple AKs to find the default for pair AK+Name.
|
|
|
549 for (const auto CPU : CPUNames) {
|
|
|
550 if (CPU.ArchID == AK && CPU.Default)
|
|
|
551 return CPU.getName();
|
|
|
552 }
|
|
|
553
|
|
|
554 // If we can't find a default then target the architecture instead
|
|
|
555 return "generic";
|
|
|
556 }
|
|
|
557
|
|
|
558 uint64_t ARM::parseHWDiv(StringRef HWDiv) {
|
|
|
559 StringRef Syn = getHWDivSynonym(HWDiv);
|
|
|
560 for (const auto D : HWDivNames) {
|
|
|
561 if (Syn == D.getName())
|
|
|
562 return D.ID;
|
|
|
563 }
|
|
|
564 return AEK_INVALID;
|
|
|
565 }
|
|
|
566
|
|
|
567 uint64_t ARM::parseArchExt(StringRef ArchExt) {
|
|
|
568 for (const auto A : ARCHExtNames) {
|
|
|
569 if (ArchExt == A.getName())
|
|
|
570 return A.ID;
|
|
|
571 }
|
|
|
572 return AEK_INVALID;
|
|
|
573 }
|
|
|
574
|
|
|
575 ARM::ArchKind ARM::parseCPUArch(StringRef CPU) {
|
|
|
576 for (const auto C : CPUNames) {
|
|
|
577 if (CPU == C.getName())
|
|
|
578 return C.ArchID;
|
|
|
579 }
|
|
|
580 return ArchKind::INVALID;
|
|
|
581 }
|
|
|
582
|
|
|
583 void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
|
|
|
584 for (const CpuNames<ArchKind> &Arch : CPUNames) {
|
|
|
585 if (Arch.ArchID != ArchKind::INVALID)
|
|
|
586 Values.push_back(Arch.getName());
|
|
|
587 }
|
|
|
588 }
|
|
|
589
|
|
|
590 StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
|
|
|
591 StringRef ArchName =
|
|
|
592 CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU));
|
|
|
593
|
|
|
594 if (TT.isOSBinFormatMachO()) {
|
|
|
595 if (TT.getEnvironment() == Triple::EABI ||
|
|
|
596 TT.getOS() == Triple::UnknownOS ||
|
|
|
597 parseArchProfile(ArchName) == ProfileKind::M)
|
|
|
598 return "aapcs";
|
|
|
599 if (TT.isWatchABI())
|
|
|
600 return "aapcs16";
|
|
|
601 return "apcs-gnu";
|
|
|
602 } else if (TT.isOSWindows())
|
|
|
603 // FIXME: this is invalid for WindowsCE.
|
|
|
604 return "aapcs";
|
|
|
605
|
|
|
606 // Select the default based on the platform.
|
|
|
607 switch (TT.getEnvironment()) {
|
|
|
608 case Triple::Android:
|
|
|
609 case Triple::GNUEABI:
|
|
|
610 case Triple::GNUEABIHF:
|
|
|
611 case Triple::MuslEABI:
|
|
|
612 case Triple::MuslEABIHF:
|
|
|
613 return "aapcs-linux";
|
|
|
614 case Triple::EABIHF:
|
|
|
615 case Triple::EABI:
|
|
|
616 return "aapcs";
|
|
|
617 default:
|
|
|
618 if (TT.isOSNetBSD())
|
|
|
619 return "apcs-gnu";
|
|
|
620 if (TT.isOSOpenBSD())
|
|
|
621 return "aapcs-linux";
|
|
|
622 return "aapcs";
|
|
|
623 }
|
|
|
624 }
|
