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annotate llvm/docs/AMDGPU/gfx7_offset_smem.rst @ 235:edfff9242030 cbc-llvm13

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author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 21 Jul 2021 11:30:30 +0900
parents 1d019706d866
children
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2 **************************************************
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3 * *
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4 * Automatically generated file, do not edit! *
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5 * *
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6 **************************************************
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8 .. _amdgpu_synid7_offset_smem:
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10 soffset
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11 ===========================
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13 An unsigned offset added to the base address to get memory address.
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15 * If offset is specified as a register, it supplies an unsigned byte offset but 2 lsb's are ignored.
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16 * If offset is specified as an :ref:`uimm32<amdgpu_synid_uimm32>`, it supplies a 32-bit unsigned byte offset but 2 lsb's are ignored.
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17 * If offset is specified as an :ref:`uimm8<amdgpu_synid_uimm8>`, it supplies an 8-bit unsigned dword offset.
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18
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19 *Size:* 1 dword.
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21 *Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`trap<amdgpu_synid_trap>`, :ref:`uimm8<amdgpu_synid_uimm8>`, :ref:`uimm32<amdgpu_synid_uimm32>`