annotate llvm/docs/AMDGPU/gfx8_addr_mimg.rst @ 235:edfff9242030 cbc-llvm13

...
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 21 Jul 2021 11:30:30 +0900
parents 1d019706d866
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
150
anatofuz
parents:
diff changeset
1 ..
anatofuz
parents:
diff changeset
2 **************************************************
anatofuz
parents:
diff changeset
3 * *
anatofuz
parents:
diff changeset
4 * Automatically generated file, do not edit! *
anatofuz
parents:
diff changeset
5 * *
anatofuz
parents:
diff changeset
6 **************************************************
anatofuz
parents:
diff changeset
7
anatofuz
parents:
diff changeset
8 .. _amdgpu_synid8_addr_mimg:
anatofuz
parents:
diff changeset
9
anatofuz
parents:
diff changeset
10 vaddr
anatofuz
parents:
diff changeset
11 ===========================
anatofuz
parents:
diff changeset
12
anatofuz
parents:
diff changeset
13 Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
anatofuz
parents:
diff changeset
14
anatofuz
parents:
diff changeset
15 *Size:* 1, 2, 3, 4, 8 or 16 dwords. Actual size depends on opcode and specific image being handled.
anatofuz
parents:
diff changeset
16
anatofuz
parents:
diff changeset
17 Note 1. Image format and dimensions are encoded in the image resource constant but not in the instruction.
anatofuz
parents:
diff changeset
18
anatofuz
parents:
diff changeset
19 Note 2. Actually image address size may vary from 1 to 13 dwords, but assembler currently supports a limited range of register sequences.
anatofuz
parents:
diff changeset
20
anatofuz
parents:
diff changeset
21 *Operands:* :ref:`v<amdgpu_synid_v>`