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150
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1 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope %s
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2
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3 ; creating v4i16->v4f16 and v4f16->v4i16 bitcasts in the selection DAG is rather
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4 ; difficult, so this test has to throw in some llvm.amdgcn.wqm to get them
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5
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173
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6 ; CHECK-LABEL: {{^}}test_to_i16:
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150
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7 ; CHECK: s_endpgm
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8 define amdgpu_ps void @test_to_i16(<4 x i32> inreg, <4 x half> inreg) #0 {
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9 %a_tmp = call <4 x half> @llvm.amdgcn.wqm.v4f16(<4 x half> %1)
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10 %a_i16_tmp = bitcast <4 x half> %a_tmp to <4 x i16>
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11 %a_i16 = call <4 x i16> @llvm.amdgcn.wqm.v4i16(<4 x i16> %a_i16_tmp)
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12
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13 %a_i32 = bitcast <4 x i16> %a_i16 to <2 x i32>
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14 call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> %a_i32, <4 x i32> %0, i32 0, i32 0, i32 0)
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15 ret void
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16 }
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17
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173
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18 ; CHECK-LABEL: {{^}}test_to_half:
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150
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19 ; CHECK: s_endpgm
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20 define amdgpu_ps void @test_to_half(<4 x i32> inreg, <4 x i16> inreg) #0 {
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21 %a_tmp = call <4 x i16> @llvm.amdgcn.wqm.v4i16(<4 x i16> %1)
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22 %a_half_tmp = bitcast <4 x i16> %a_tmp to <4 x half>
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23 %a_half = call <4 x half> @llvm.amdgcn.wqm.v4f16(<4 x half> %a_half_tmp)
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24
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25 %a_i32 = bitcast <4 x half> %a_half to <2 x i32>
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26 call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> %a_i32, <4 x i32> %0, i32 0, i32 0, i32 0)
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27 ret void
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28 }
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29
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30 declare <4 x half> @llvm.amdgcn.wqm.v4f16(<4 x half>) #1
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31 declare <4 x i16> @llvm.amdgcn.wqm.v4i16(<4 x i16>) #1
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32 declare void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32>, <4 x i32>, i32, i32, i32) #0
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33
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34 attributes #0 = { nounwind }
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35 attributes #1 = { nounwind readonly }
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