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150
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1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2 ; RUN: llc < %s -mtriple=amdgcn-- -verify-machineinstrs | FileCheck %s -check-prefix=GCN
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3
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4 declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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5
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6 ; Make sure the add and load are reduced to 32-bits even with the
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7 ; bitcast to vector.
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8 define amdgpu_kernel void @bitcast_int_to_vector_extract_0(i32 addrspace(1)* %out, i64 addrspace(1)* %in, i64 %b) {
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9 ; GCN-LABEL: bitcast_int_to_vector_extract_0:
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10 ; GCN: ; %bb.0:
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11 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
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12 ; GCN-NEXT: s_load_dword s12, s[0:1], 0xd
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13 ; GCN-NEXT: s_mov_b32 s3, 0xf000
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14 ; GCN-NEXT: s_mov_b32 s10, 0
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15 ; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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16 ; GCN-NEXT: v_mov_b32_e32 v1, 0
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17 ; GCN-NEXT: s_mov_b32 s11, s3
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18 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
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19 ; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]
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20 ; GCN-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
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21 ; GCN-NEXT: s_mov_b32 s2, -1
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22 ; GCN-NEXT: s_mov_b32 s0, s4
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23 ; GCN-NEXT: s_mov_b32 s1, s5
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24 ; GCN-NEXT: s_waitcnt vmcnt(0)
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25 ; GCN-NEXT: v_add_i32_e32 v0, vcc, s12, v0
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26 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
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27 ; GCN-NEXT: s_endpgm
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28 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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29 %gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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30 %a = load i64, i64 addrspace(1)* %gep
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31 %add = add i64 %a, %b
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32 %val.bc = bitcast i64 %add to <2 x i32>
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33 %extract = extractelement <2 x i32> %val.bc, i32 0
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34 store i32 %extract, i32 addrspace(1)* %out
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35 ret void
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36 }
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37
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38 define amdgpu_kernel void @bitcast_fp_to_vector_extract_0(i32 addrspace(1)* %out, double addrspace(1)* %in, double %b) {
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39 ; GCN-LABEL: bitcast_fp_to_vector_extract_0:
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40 ; GCN: ; %bb.0:
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41 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
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42 ; GCN-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0xd
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43 ; GCN-NEXT: s_mov_b32 s3, 0xf000
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44 ; GCN-NEXT: s_mov_b32 s10, 0
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45 ; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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46 ; GCN-NEXT: v_mov_b32_e32 v1, 0
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47 ; GCN-NEXT: s_mov_b32 s11, s3
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48 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
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49 ; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]
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50 ; GCN-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[8:11], 0 addr64
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51 ; GCN-NEXT: s_mov_b32 s2, -1
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52 ; GCN-NEXT: s_mov_b32 s0, s4
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53 ; GCN-NEXT: s_mov_b32 s1, s5
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54 ; GCN-NEXT: s_waitcnt vmcnt(0)
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55 ; GCN-NEXT: v_add_f64 v[0:1], v[0:1], s[12:13]
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56 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
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57 ; GCN-NEXT: s_endpgm
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58 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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59 %gep = getelementptr double, double addrspace(1)* %in, i32 %tid
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60 %a = load double, double addrspace(1)* %gep
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61 %add = fadd double %a, %b
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62 %val.bc = bitcast double %add to <2 x i32>
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63 %extract = extractelement <2 x i32> %val.bc, i32 0
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64 store i32 %extract, i32 addrspace(1)* %out
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65 ret void
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66 }
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67
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68 define amdgpu_kernel void @bitcast_int_to_fpvector_extract_0(float addrspace(1)* %out, i64 addrspace(1)* %in, i64 %b) {
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69 ; GCN-LABEL: bitcast_int_to_fpvector_extract_0:
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70 ; GCN: ; %bb.0:
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71 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
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173
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72 ; GCN-NEXT: s_load_dword s12, s[0:1], 0xd
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150
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73 ; GCN-NEXT: s_mov_b32 s3, 0xf000
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74 ; GCN-NEXT: s_mov_b32 s10, 0
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75 ; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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76 ; GCN-NEXT: v_mov_b32_e32 v1, 0
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77 ; GCN-NEXT: s_mov_b32 s11, s3
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78 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
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79 ; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]
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173
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80 ; GCN-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
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150
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81 ; GCN-NEXT: s_mov_b32 s2, -1
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82 ; GCN-NEXT: s_mov_b32 s0, s4
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83 ; GCN-NEXT: s_mov_b32 s1, s5
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84 ; GCN-NEXT: s_waitcnt vmcnt(0)
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85 ; GCN-NEXT: v_add_i32_e32 v0, vcc, s12, v0
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86 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
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87 ; GCN-NEXT: s_endpgm
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88 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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89 %gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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90 %a = load i64, i64 addrspace(1)* %gep
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91 %add = add i64 %a, %b
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92 %val.bc = bitcast i64 %add to <2 x float>
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93 %extract = extractelement <2 x float> %val.bc, i32 0
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94 store float %extract, float addrspace(1)* %out
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95 ret void
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96 }
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97
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98 define amdgpu_kernel void @no_extract_volatile_load_extract0(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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99 ; GCN-LABEL: no_extract_volatile_load_extract0:
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100 ; GCN: ; %bb.0: ; %entry
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101 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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102 ; GCN-NEXT: s_mov_b32 s7, 0xf000
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103 ; GCN-NEXT: s_mov_b32 s6, -1
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104 ; GCN-NEXT: s_mov_b32 s10, s6
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105 ; GCN-NEXT: s_mov_b32 s11, s7
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106 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
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107 ; GCN-NEXT: s_mov_b32 s8, s2
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108 ; GCN-NEXT: s_mov_b32 s9, s3
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109 ; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0
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110 ; GCN-NEXT: s_mov_b32 s4, s0
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111 ; GCN-NEXT: s_mov_b32 s5, s1
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112 ; GCN-NEXT: s_waitcnt vmcnt(0)
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113 ; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
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114 ; GCN-NEXT: s_endpgm
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115 entry:
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116 %vec = load volatile <4 x i32>, <4 x i32> addrspace(1)* %in
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117 %elt0 = extractelement <4 x i32> %vec, i32 0
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118 store i32 %elt0, i32 addrspace(1)* %out
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119 ret void
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120 }
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121
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122 define amdgpu_kernel void @no_extract_volatile_load_extract2(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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123 ; GCN-LABEL: no_extract_volatile_load_extract2:
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124 ; GCN: ; %bb.0: ; %entry
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125 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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126 ; GCN-NEXT: s_mov_b32 s7, 0xf000
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127 ; GCN-NEXT: s_mov_b32 s6, -1
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128 ; GCN-NEXT: s_mov_b32 s10, s6
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129 ; GCN-NEXT: s_mov_b32 s11, s7
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130 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
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131 ; GCN-NEXT: s_mov_b32 s8, s2
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132 ; GCN-NEXT: s_mov_b32 s9, s3
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133 ; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0
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134 ; GCN-NEXT: s_mov_b32 s4, s0
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135 ; GCN-NEXT: s_mov_b32 s5, s1
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136 ; GCN-NEXT: s_waitcnt vmcnt(0)
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137 ; GCN-NEXT: buffer_store_dword v2, off, s[4:7], 0
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138 ; GCN-NEXT: s_endpgm
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139 entry:
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140 %vec = load volatile <4 x i32>, <4 x i32> addrspace(1)* %in
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141 %elt2 = extractelement <4 x i32> %vec, i32 2
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142 store i32 %elt2, i32 addrspace(1)* %out
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143 ret void
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144 }
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145
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146 define amdgpu_kernel void @no_extract_volatile_load_dynextract(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in, i32 %idx) {
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147 ; GCN-LABEL: no_extract_volatile_load_dynextract:
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148 ; GCN: ; %bb.0: ; %entry
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149 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
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150 ; GCN-NEXT: s_mov_b32 s3, 0xf000
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151 ; GCN-NEXT: s_mov_b32 s2, -1
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152 ; GCN-NEXT: s_load_dword s12, s[0:1], 0xd
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153 ; GCN-NEXT: s_mov_b32 s10, s2
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154 ; GCN-NEXT: s_mov_b32 s11, s3
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155 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
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156 ; GCN-NEXT: s_mov_b32 s8, s6
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157 ; GCN-NEXT: s_mov_b32 s9, s7
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158 ; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0
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159 ; GCN-NEXT: s_mov_b32 s0, s4
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160 ; GCN-NEXT: s_mov_b32 s1, s5
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161 ; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s12, 1
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162 ; GCN-NEXT: s_waitcnt vmcnt(0)
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163 ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
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164 ; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s12, 2
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165 ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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166 ; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s12, 3
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167 ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
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168 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
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169 ; GCN-NEXT: s_endpgm
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170 entry:
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171 %vec = load volatile <4 x i32>, <4 x i32> addrspace(1)* %in
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172 %eltN = extractelement <4 x i32> %vec, i32 %idx
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173 store i32 %eltN, i32 addrspace(1)* %out
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174 ret void
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175 }
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