annotate llvm/test/CodeGen/AMDGPU/fdiv.f64.ll @ 206:f17a3b42b08b

Added tag before-12 for changeset b7591485f4cd
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 07 Jun 2021 21:25:57 +0900
parents 1d019706d866
children 2e18cbf3894f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
150
anatofuz
parents:
diff changeset
1 ; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s
anatofuz
parents:
diff changeset
2 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s
anatofuz
parents:
diff changeset
3 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s
anatofuz
parents:
diff changeset
4
anatofuz
parents:
diff changeset
5
anatofuz
parents:
diff changeset
6 ; GCN-LABEL: {{^}}fdiv_f64:
anatofuz
parents:
diff changeset
7 ; GCN-DAG: buffer_load_dwordx2 [[NUM:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0
anatofuz
parents:
diff changeset
8 ; GCN-DAG: buffer_load_dwordx2 [[DEN:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0 offset:8
anatofuz
parents:
diff changeset
9 ; CI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]]
anatofuz
parents:
diff changeset
10 ; CI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], vcc, [[NUM]], [[DEN]], [[NUM]]
anatofuz
parents:
diff changeset
11
anatofuz
parents:
diff changeset
12 ; Check for div_scale bug workaround on SI
anatofuz
parents:
diff changeset
13 ; SI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]]
anatofuz
parents:
diff changeset
14 ; SI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[NUM]], [[DEN]], [[NUM]]
anatofuz
parents:
diff changeset
15
anatofuz
parents:
diff changeset
16 ; GCN-DAG: v_rcp_f64_e32 [[RCP_SCALE0:v\[[0-9]+:[0-9]+\]]], [[SCALE0]]
anatofuz
parents:
diff changeset
17
anatofuz
parents:
diff changeset
18 ; SI-DAG: v_cmp_eq_u32_e32 vcc, {{v[0-9]+}}, {{v[0-9]+}}
anatofuz
parents:
diff changeset
19 ; SI-DAG: v_cmp_eq_u32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], {{v[0-9]+}}, {{v[0-9]+}}
anatofuz
parents:
diff changeset
20 ; SI-DAG: s_xor_b64 vcc, [[CMP0]], vcc
anatofuz
parents:
diff changeset
21
anatofuz
parents:
diff changeset
22 ; GCN-DAG: v_fma_f64 [[FMA0:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[RCP_SCALE0]], 1.0
anatofuz
parents:
diff changeset
23 ; GCN-DAG: v_fma_f64 [[FMA1:v\[[0-9]+:[0-9]+\]]], [[RCP_SCALE0]], [[FMA0]], [[RCP_SCALE0]]
anatofuz
parents:
diff changeset
24 ; GCN-DAG: v_fma_f64 [[FMA2:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[FMA1]], 1.0
anatofuz
parents:
diff changeset
25 ; GCN-DAG: v_fma_f64 [[FMA3:v\[[0-9]+:[0-9]+\]]], [[FMA1]], [[FMA2]], [[FMA1]]
anatofuz
parents:
diff changeset
26 ; GCN-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[SCALE1]], [[FMA3]]
anatofuz
parents:
diff changeset
27 ; GCN-DAG: v_fma_f64 [[FMA4:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[MUL]], [[SCALE1]]
anatofuz
parents:
diff changeset
28 ; GCN: v_div_fmas_f64 [[FMAS:v\[[0-9]+:[0-9]+\]]], [[FMA4]], [[FMA3]], [[MUL]]
anatofuz
parents:
diff changeset
29 ; GCN: v_div_fixup_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[FMAS]], [[DEN]], [[NUM]]
anatofuz
parents:
diff changeset
30 ; GCN: buffer_store_dwordx2 [[RESULT]]
anatofuz
parents:
diff changeset
31 ; GCN: s_endpgm
anatofuz
parents:
diff changeset
32 define amdgpu_kernel void @fdiv_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
anatofuz
parents:
diff changeset
33 %gep.1 = getelementptr double, double addrspace(1)* %in, i32 1
anatofuz
parents:
diff changeset
34 %num = load volatile double, double addrspace(1)* %in
anatofuz
parents:
diff changeset
35 %den = load volatile double, double addrspace(1)* %gep.1
anatofuz
parents:
diff changeset
36 %result = fdiv double %num, %den
anatofuz
parents:
diff changeset
37 store double %result, double addrspace(1)* %out
anatofuz
parents:
diff changeset
38 ret void
anatofuz
parents:
diff changeset
39 }
anatofuz
parents:
diff changeset
40
anatofuz
parents:
diff changeset
41 ; GCN-LABEL: {{^}}fdiv_f64_s_v:
anatofuz
parents:
diff changeset
42 define amdgpu_kernel void @fdiv_f64_s_v(double addrspace(1)* %out, double addrspace(1)* %in, double %num) #0 {
anatofuz
parents:
diff changeset
43 %den = load double, double addrspace(1)* %in
anatofuz
parents:
diff changeset
44 %result = fdiv double %num, %den
anatofuz
parents:
diff changeset
45 store double %result, double addrspace(1)* %out
anatofuz
parents:
diff changeset
46 ret void
anatofuz
parents:
diff changeset
47 }
anatofuz
parents:
diff changeset
48
anatofuz
parents:
diff changeset
49 ; GCN-LABEL: {{^}}fdiv_f64_v_s:
anatofuz
parents:
diff changeset
50 define amdgpu_kernel void @fdiv_f64_v_s(double addrspace(1)* %out, double addrspace(1)* %in, double %den) #0 {
anatofuz
parents:
diff changeset
51 %num = load double, double addrspace(1)* %in
anatofuz
parents:
diff changeset
52 %result = fdiv double %num, %den
anatofuz
parents:
diff changeset
53 store double %result, double addrspace(1)* %out
anatofuz
parents:
diff changeset
54 ret void
anatofuz
parents:
diff changeset
55 }
anatofuz
parents:
diff changeset
56
anatofuz
parents:
diff changeset
57 ; GCN-LABEL: {{^}}fdiv_f64_s_s:
anatofuz
parents:
diff changeset
58 define amdgpu_kernel void @fdiv_f64_s_s(double addrspace(1)* %out, double %num, double %den) #0 {
anatofuz
parents:
diff changeset
59 %result = fdiv double %num, %den
anatofuz
parents:
diff changeset
60 store double %result, double addrspace(1)* %out
anatofuz
parents:
diff changeset
61 ret void
anatofuz
parents:
diff changeset
62 }
anatofuz
parents:
diff changeset
63
anatofuz
parents:
diff changeset
64 ; GCN-LABEL: {{^}}v_fdiv_v2f64:
anatofuz
parents:
diff changeset
65 define amdgpu_kernel void @v_fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %in) #0 {
anatofuz
parents:
diff changeset
66 %gep.1 = getelementptr <2 x double>, <2 x double> addrspace(1)* %in, i32 1
anatofuz
parents:
diff changeset
67 %num = load <2 x double>, <2 x double> addrspace(1)* %in
anatofuz
parents:
diff changeset
68 %den = load <2 x double>, <2 x double> addrspace(1)* %gep.1
anatofuz
parents:
diff changeset
69 %result = fdiv <2 x double> %num, %den
anatofuz
parents:
diff changeset
70 store <2 x double> %result, <2 x double> addrspace(1)* %out
anatofuz
parents:
diff changeset
71 ret void
anatofuz
parents:
diff changeset
72 }
anatofuz
parents:
diff changeset
73
anatofuz
parents:
diff changeset
74 ; GCN-LABEL: {{^}}s_fdiv_v2f64:
anatofuz
parents:
diff changeset
75 define amdgpu_kernel void @s_fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %num, <2 x double> %den) {
anatofuz
parents:
diff changeset
76 %result = fdiv <2 x double> %num, %den
anatofuz
parents:
diff changeset
77 store <2 x double> %result, <2 x double> addrspace(1)* %out
anatofuz
parents:
diff changeset
78 ret void
anatofuz
parents:
diff changeset
79 }
anatofuz
parents:
diff changeset
80
anatofuz
parents:
diff changeset
81 ; GCN-LABEL: {{^}}v_fdiv_v4f64:
anatofuz
parents:
diff changeset
82 define amdgpu_kernel void @v_fdiv_v4f64(<4 x double> addrspace(1)* %out, <4 x double> addrspace(1)* %in) #0 {
anatofuz
parents:
diff changeset
83 %gep.1 = getelementptr <4 x double>, <4 x double> addrspace(1)* %in, i32 1
anatofuz
parents:
diff changeset
84 %num = load <4 x double>, <4 x double> addrspace(1)* %in
anatofuz
parents:
diff changeset
85 %den = load <4 x double>, <4 x double> addrspace(1)* %gep.1
anatofuz
parents:
diff changeset
86 %result = fdiv <4 x double> %num, %den
anatofuz
parents:
diff changeset
87 store <4 x double> %result, <4 x double> addrspace(1)* %out
anatofuz
parents:
diff changeset
88 ret void
anatofuz
parents:
diff changeset
89 }
anatofuz
parents:
diff changeset
90
anatofuz
parents:
diff changeset
91 ; GCN-LABEL: {{^}}s_fdiv_v4f64:
anatofuz
parents:
diff changeset
92 define amdgpu_kernel void @s_fdiv_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %num, <4 x double> %den) #0 {
anatofuz
parents:
diff changeset
93 %result = fdiv <4 x double> %num, %den
anatofuz
parents:
diff changeset
94 store <4 x double> %result, <4 x double> addrspace(1)* %out
anatofuz
parents:
diff changeset
95 ret void
anatofuz
parents:
diff changeset
96 }
anatofuz
parents:
diff changeset
97
anatofuz
parents:
diff changeset
98 ; GCN-LABEL: {{^}}div_fast_2_x_pat_f64:
anatofuz
parents:
diff changeset
99 ; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, 0.5
anatofuz
parents:
diff changeset
100 ; GCN: buffer_store_dwordx2 [[MUL]]
anatofuz
parents:
diff changeset
101 define amdgpu_kernel void @div_fast_2_x_pat_f64(double addrspace(1)* %out) #1 {
anatofuz
parents:
diff changeset
102 %x = load double, double addrspace(1)* undef
anatofuz
parents:
diff changeset
103 %rcp = fdiv fast double %x, 2.0
anatofuz
parents:
diff changeset
104 store double %rcp, double addrspace(1)* %out, align 4
anatofuz
parents:
diff changeset
105 ret void
anatofuz
parents:
diff changeset
106 }
anatofuz
parents:
diff changeset
107
anatofuz
parents:
diff changeset
108 ; GCN-LABEL: {{^}}div_fast_k_x_pat_f64:
anatofuz
parents:
diff changeset
109 ; GCN-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0x9999999a
anatofuz
parents:
diff changeset
110 ; GCN-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 0x3fb99999
anatofuz
parents:
diff changeset
111 ; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI]]{{\]}}
anatofuz
parents:
diff changeset
112 ; GCN: buffer_store_dwordx2 [[MUL]]
anatofuz
parents:
diff changeset
113 define amdgpu_kernel void @div_fast_k_x_pat_f64(double addrspace(1)* %out) #1 {
anatofuz
parents:
diff changeset
114 %x = load double, double addrspace(1)* undef
anatofuz
parents:
diff changeset
115 %rcp = fdiv fast double %x, 10.0
anatofuz
parents:
diff changeset
116 store double %rcp, double addrspace(1)* %out, align 4
anatofuz
parents:
diff changeset
117 ret void
anatofuz
parents:
diff changeset
118 }
anatofuz
parents:
diff changeset
119
anatofuz
parents:
diff changeset
120 ; GCN-LABEL: {{^}}div_fast_neg_k_x_pat_f64:
anatofuz
parents:
diff changeset
121 ; GCN-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0x9999999a
anatofuz
parents:
diff changeset
122 ; GCN-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 0xbfb99999
anatofuz
parents:
diff changeset
123 ; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI]]{{\]}}
anatofuz
parents:
diff changeset
124 ; GCN: buffer_store_dwordx2 [[MUL]]
anatofuz
parents:
diff changeset
125 define amdgpu_kernel void @div_fast_neg_k_x_pat_f64(double addrspace(1)* %out) #1 {
anatofuz
parents:
diff changeset
126 %x = load double, double addrspace(1)* undef
anatofuz
parents:
diff changeset
127 %rcp = fdiv fast double %x, -10.0
anatofuz
parents:
diff changeset
128 store double %rcp, double addrspace(1)* %out, align 4
anatofuz
parents:
diff changeset
129 ret void
anatofuz
parents:
diff changeset
130 }
anatofuz
parents:
diff changeset
131
anatofuz
parents:
diff changeset
132 attributes #0 = { nounwind }
anatofuz
parents:
diff changeset
133 attributes #1 = { nounwind "unsafe-fp-math"="true" }