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1 ; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s
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2 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s
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3 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s
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4
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5
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6 ; GCN-LABEL: {{^}}fdiv_f64:
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7 ; GCN-DAG: buffer_load_dwordx2 [[NUM:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0
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8 ; GCN-DAG: buffer_load_dwordx2 [[DEN:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0 offset:8
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9 ; CI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]]
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10 ; CI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], vcc, [[NUM]], [[DEN]], [[NUM]]
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11
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12 ; Check for div_scale bug workaround on SI
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13 ; SI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]]
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14 ; SI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[NUM]], [[DEN]], [[NUM]]
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15
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16 ; GCN-DAG: v_rcp_f64_e32 [[RCP_SCALE0:v\[[0-9]+:[0-9]+\]]], [[SCALE0]]
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17
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18 ; SI-DAG: v_cmp_eq_u32_e32 vcc, {{v[0-9]+}}, {{v[0-9]+}}
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19 ; SI-DAG: v_cmp_eq_u32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], {{v[0-9]+}}, {{v[0-9]+}}
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20 ; SI-DAG: s_xor_b64 vcc, [[CMP0]], vcc
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21
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22 ; GCN-DAG: v_fma_f64 [[FMA0:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[RCP_SCALE0]], 1.0
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23 ; GCN-DAG: v_fma_f64 [[FMA1:v\[[0-9]+:[0-9]+\]]], [[RCP_SCALE0]], [[FMA0]], [[RCP_SCALE0]]
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24 ; GCN-DAG: v_fma_f64 [[FMA2:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[FMA1]], 1.0
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25 ; GCN-DAG: v_fma_f64 [[FMA3:v\[[0-9]+:[0-9]+\]]], [[FMA1]], [[FMA2]], [[FMA1]]
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26 ; GCN-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[SCALE1]], [[FMA3]]
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27 ; GCN-DAG: v_fma_f64 [[FMA4:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[MUL]], [[SCALE1]]
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28 ; GCN: v_div_fmas_f64 [[FMAS:v\[[0-9]+:[0-9]+\]]], [[FMA4]], [[FMA3]], [[MUL]]
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29 ; GCN: v_div_fixup_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[FMAS]], [[DEN]], [[NUM]]
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30 ; GCN: buffer_store_dwordx2 [[RESULT]]
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31 ; GCN: s_endpgm
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32 define amdgpu_kernel void @fdiv_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
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33 %gep.1 = getelementptr double, double addrspace(1)* %in, i32 1
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34 %num = load volatile double, double addrspace(1)* %in
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35 %den = load volatile double, double addrspace(1)* %gep.1
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36 %result = fdiv double %num, %den
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37 store double %result, double addrspace(1)* %out
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38 ret void
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39 }
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40
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41 ; GCN-LABEL: {{^}}fdiv_f64_s_v:
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42 define amdgpu_kernel void @fdiv_f64_s_v(double addrspace(1)* %out, double addrspace(1)* %in, double %num) #0 {
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43 %den = load double, double addrspace(1)* %in
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44 %result = fdiv double %num, %den
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45 store double %result, double addrspace(1)* %out
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46 ret void
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47 }
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48
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49 ; GCN-LABEL: {{^}}fdiv_f64_v_s:
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50 define amdgpu_kernel void @fdiv_f64_v_s(double addrspace(1)* %out, double addrspace(1)* %in, double %den) #0 {
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51 %num = load double, double addrspace(1)* %in
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52 %result = fdiv double %num, %den
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53 store double %result, double addrspace(1)* %out
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54 ret void
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55 }
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56
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57 ; GCN-LABEL: {{^}}fdiv_f64_s_s:
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58 define amdgpu_kernel void @fdiv_f64_s_s(double addrspace(1)* %out, double %num, double %den) #0 {
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59 %result = fdiv double %num, %den
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60 store double %result, double addrspace(1)* %out
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61 ret void
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62 }
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63
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64 ; GCN-LABEL: {{^}}v_fdiv_v2f64:
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65 define amdgpu_kernel void @v_fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %in) #0 {
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66 %gep.1 = getelementptr <2 x double>, <2 x double> addrspace(1)* %in, i32 1
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67 %num = load <2 x double>, <2 x double> addrspace(1)* %in
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68 %den = load <2 x double>, <2 x double> addrspace(1)* %gep.1
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69 %result = fdiv <2 x double> %num, %den
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70 store <2 x double> %result, <2 x double> addrspace(1)* %out
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71 ret void
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72 }
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73
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74 ; GCN-LABEL: {{^}}s_fdiv_v2f64:
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75 define amdgpu_kernel void @s_fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %num, <2 x double> %den) {
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76 %result = fdiv <2 x double> %num, %den
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77 store <2 x double> %result, <2 x double> addrspace(1)* %out
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78 ret void
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79 }
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80
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81 ; GCN-LABEL: {{^}}v_fdiv_v4f64:
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82 define amdgpu_kernel void @v_fdiv_v4f64(<4 x double> addrspace(1)* %out, <4 x double> addrspace(1)* %in) #0 {
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83 %gep.1 = getelementptr <4 x double>, <4 x double> addrspace(1)* %in, i32 1
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84 %num = load <4 x double>, <4 x double> addrspace(1)* %in
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85 %den = load <4 x double>, <4 x double> addrspace(1)* %gep.1
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86 %result = fdiv <4 x double> %num, %den
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87 store <4 x double> %result, <4 x double> addrspace(1)* %out
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88 ret void
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89 }
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90
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91 ; GCN-LABEL: {{^}}s_fdiv_v4f64:
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92 define amdgpu_kernel void @s_fdiv_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %num, <4 x double> %den) #0 {
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93 %result = fdiv <4 x double> %num, %den
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94 store <4 x double> %result, <4 x double> addrspace(1)* %out
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95 ret void
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96 }
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97
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98 ; GCN-LABEL: {{^}}div_fast_2_x_pat_f64:
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99 ; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, 0.5
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100 ; GCN: buffer_store_dwordx2 [[MUL]]
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101 define amdgpu_kernel void @div_fast_2_x_pat_f64(double addrspace(1)* %out) #1 {
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102 %x = load double, double addrspace(1)* undef
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103 %rcp = fdiv fast double %x, 2.0
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104 store double %rcp, double addrspace(1)* %out, align 4
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105 ret void
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106 }
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107
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108 ; GCN-LABEL: {{^}}div_fast_k_x_pat_f64:
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109 ; GCN-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0x9999999a
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110 ; GCN-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 0x3fb99999
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111 ; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI]]{{\]}}
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112 ; GCN: buffer_store_dwordx2 [[MUL]]
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113 define amdgpu_kernel void @div_fast_k_x_pat_f64(double addrspace(1)* %out) #1 {
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114 %x = load double, double addrspace(1)* undef
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115 %rcp = fdiv fast double %x, 10.0
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116 store double %rcp, double addrspace(1)* %out, align 4
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117 ret void
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118 }
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119
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120 ; GCN-LABEL: {{^}}div_fast_neg_k_x_pat_f64:
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121 ; GCN-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0x9999999a
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122 ; GCN-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 0xbfb99999
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123 ; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI]]{{\]}}
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124 ; GCN: buffer_store_dwordx2 [[MUL]]
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125 define amdgpu_kernel void @div_fast_neg_k_x_pat_f64(double addrspace(1)* %out) #1 {
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126 %x = load double, double addrspace(1)* undef
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127 %rcp = fdiv fast double %x, -10.0
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128 store double %rcp, double addrspace(1)* %out, align 4
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129 ret void
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130 }
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131
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132 attributes #0 = { nounwind }
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133 attributes #1 = { nounwind "unsafe-fp-math"="true" }
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