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150
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1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=kaveri -mattr=-promote-alloca -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI %s
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2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-promote-alloca -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s
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3
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4 ; Test that non-entry function frame indices are expanded properly to
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5 ; give an index relative to the scratch wave offset register
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6
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7 ; Materialize into a mov. Make sure there isn't an unnecessary copy.
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8 ; GCN-LABEL: {{^}}func_mov_fi_i32:
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9 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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10
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173
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11 ; CI-NEXT: v_lshr_b32_e64 v0, s32, 6
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12 ; GFX9-NEXT: v_lshrrev_b32_e64 v0, 6, s32
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150
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13
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14 ; GCN-NOT: v_mov
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15 ; GCN: ds_write_b32 v0, v0
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16 define void @func_mov_fi_i32() #0 {
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17 %alloca = alloca i32, addrspace(5)
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18 store volatile i32 addrspace(5)* %alloca, i32 addrspace(5)* addrspace(3)* undef
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19 ret void
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20 }
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21
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22 ; Offset due to different objects
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23 ; GCN-LABEL: {{^}}func_mov_fi_i32_offset:
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24 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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25
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173
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26 ; CI-DAG: v_lshr_b32_e64 v0, s32, 6
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150
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27 ; CI-NOT: v_mov
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28 ; CI: ds_write_b32 v0, v0
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173
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29 ; CI-NEXT: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s32, 6
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30 ; CI-NEXT: v_add_i32_e{{32|64}} v0, {{s\[[0-9]+:[0-9]+\]|vcc}}, 4, [[SCALED]]
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150
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31 ; CI-NEXT: ds_write_b32 v0, v0
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32
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173
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33 ; GFX9: v_lshrrev_b32_e64 v0, 6, s32
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34 ; GFX9-NEXT: ds_write_b32 v0, v0
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35 ; GFX9-NEXT: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, s32
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150
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36 ; GFX9-NEXT: v_add_u32_e32 v0, 4, [[SCALED]]
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37 ; GFX9-NEXT: ds_write_b32 v0, v0
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38 define void @func_mov_fi_i32_offset() #0 {
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39 %alloca0 = alloca i32, addrspace(5)
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40 %alloca1 = alloca i32, addrspace(5)
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41 store volatile i32 addrspace(5)* %alloca0, i32 addrspace(5)* addrspace(3)* undef
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42 store volatile i32 addrspace(5)* %alloca1, i32 addrspace(5)* addrspace(3)* undef
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43 ret void
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44 }
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45
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46 ; Materialize into an add of a constant offset from the FI.
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47 ; FIXME: Should be able to merge adds
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48
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49 ; GCN-LABEL: {{^}}func_add_constant_to_fi_i32:
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50 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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51
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173
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52 ; CI: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s32, 6
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150
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53 ; CI-NEXT: v_add_i32_e32 v0, vcc, 4, [[SCALED]]
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54
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173
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55 ; GFX9: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, s32
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150
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56 ; GFX9-NEXT: v_add_u32_e32 v0, 4, [[SCALED]]
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57
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58 ; GCN-NOT: v_mov
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59 ; GCN: ds_write_b32 v0, v0
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60 define void @func_add_constant_to_fi_i32() #0 {
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61 %alloca = alloca [2 x i32], align 4, addrspace(5)
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62 %gep0 = getelementptr inbounds [2 x i32], [2 x i32] addrspace(5)* %alloca, i32 0, i32 1
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63 store volatile i32 addrspace(5)* %gep0, i32 addrspace(5)* addrspace(3)* undef
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64 ret void
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65 }
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66
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67 ; A user the materialized frame index can't be meaningfully folded
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68 ; into.
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69
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70 ; GCN-LABEL: {{^}}func_other_fi_user_i32:
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71
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173
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72 ; CI: v_lshr_b32_e64 v0, s32, 6
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150
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73
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173
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74 ; GFX9: v_lshrrev_b32_e64 v0, 6, s32
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150
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75
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76 ; GCN-NEXT: v_mul_u32_u24_e32 v0, 9, v0
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77 ; GCN-NOT: v_mov
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78 ; GCN: ds_write_b32 v0, v0
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79 define void @func_other_fi_user_i32() #0 {
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80 %alloca = alloca [2 x i32], align 4, addrspace(5)
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81 %ptrtoint = ptrtoint [2 x i32] addrspace(5)* %alloca to i32
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82 %mul = mul i32 %ptrtoint, 9
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83 store volatile i32 %mul, i32 addrspace(3)* undef
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84 ret void
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85 }
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86
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87 ; GCN-LABEL: {{^}}func_store_private_arg_i32_ptr:
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88 ; GCN: v_mov_b32_e32 v1, 15{{$}}
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173
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89 ; GCN: buffer_store_dword v1, v0, s[0:3], 0 offen{{$}}
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150
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90 define void @func_store_private_arg_i32_ptr(i32 addrspace(5)* %ptr) #0 {
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91 store volatile i32 15, i32 addrspace(5)* %ptr
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92 ret void
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93 }
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94
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95 ; GCN-LABEL: {{^}}func_load_private_arg_i32_ptr:
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96 ; GCN: s_waitcnt
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173
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97 ; GCN-NEXT: buffer_load_dword v0, v0, s[0:3], 0 offen{{$}}
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150
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98 define void @func_load_private_arg_i32_ptr(i32 addrspace(5)* %ptr) #0 {
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99 %val = load volatile i32, i32 addrspace(5)* %ptr
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100 ret void
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101 }
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102
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103 ; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr:
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104 ; GCN: s_waitcnt
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105
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173
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106 ; CI: v_lshr_b32_e64 [[SHIFT:v[0-9]+]], s32, 6
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150
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107 ; CI-NEXT: v_or_b32_e32 v0, 4, [[SHIFT]]
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108
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173
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109 ; GFX9: v_lshrrev_b32_e64 [[SHIFT:v[0-9]+]], 6, s32
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150
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110 ; GFX9-NEXT: v_or_b32_e32 v0, 4, [[SHIFT]]
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111
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112 ; GCN-NOT: v_mov
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113 ; GCN: ds_write_b32 v0, v0
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114 define void @void_func_byval_struct_i8_i32_ptr({ i8, i32 } addrspace(5)* byval %arg0) #0 {
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115 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
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116 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1
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117 %load1 = load i32, i32 addrspace(5)* %gep1
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118 store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef
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119 ret void
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120 }
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121
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122 ; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr_value:
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123 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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124 ; GCN-NEXT: buffer_load_ubyte v0, off, s[0:3], s32
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125 ; GCN_NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4
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126 define void @void_func_byval_struct_i8_i32_ptr_value({ i8, i32 } addrspace(5)* byval %arg0) #0 {
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127 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
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128 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1
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129 %load0 = load i8, i8 addrspace(5)* %gep0
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130 %load1 = load i32, i32 addrspace(5)* %gep1
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131 store volatile i8 %load0, i8 addrspace(3)* undef
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132 store volatile i32 %load1, i32 addrspace(3)* undef
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133 ret void
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134 }
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135
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136 ; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr_nonentry_block:
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137
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173
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138 ; CI: v_lshr_b32_e64 [[SHIFT:v[0-9]+]], s32, 6
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150
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139
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173
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140 ; GFX9: v_lshrrev_b32_e64 [[SHIFT:v[0-9]+]], 6, s32
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150
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141
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142 ; GCN: s_and_saveexec_b64
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143
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144 ; CI: v_add_i32_e32 [[GEP:v[0-9]+]], vcc, 4, [[SHIFT]]
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145 ; CI: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32 offset:4{{$}}
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146
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147 ; GFX9: v_add_u32_e32 [[GEP:v[0-9]+]], 4, [[SHIFT]]
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148 ; GFX9: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32 offset:4{{$}}
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149
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150 ; GCN: ds_write_b32 v{{[0-9]+}}, [[GEP]]
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151 define void @void_func_byval_struct_i8_i32_ptr_nonentry_block({ i8, i32 } addrspace(5)* byval %arg0, i32 %arg2) #0 {
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152 %cmp = icmp eq i32 %arg2, 0
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153 br i1 %cmp, label %bb, label %ret
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154
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155 bb:
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156 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
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157 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1
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158 %load1 = load volatile i32, i32 addrspace(5)* %gep1
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159 store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef
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160 br label %ret
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161
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162 ret:
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163 ret void
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164 }
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165
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166 ; Added offset can't be used with VOP3 add
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167 ; GCN-LABEL: {{^}}func_other_fi_user_non_inline_imm_offset_i32:
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173
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168
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150
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169 ; CI-DAG: s_movk_i32 [[K:s[0-9]+|vcc_lo|vcc_hi]], 0x200
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173
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170 ; CI-DAG: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s32, 6
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150
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171 ; CI: v_add_i32_e32 [[VZ:v[0-9]+]], vcc, [[K]], [[SCALED]]
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172
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173
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173 ; GFX9-DAG: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, s32
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150
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174 ; GFX9: v_add_u32_e32 [[VZ:v[0-9]+]], 0x200, [[SCALED]]
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175
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176 ; GCN: v_mul_u32_u24_e32 [[VZ]], 9, [[VZ]]
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177 ; GCN: ds_write_b32 v0, [[VZ]]
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178 define void @func_other_fi_user_non_inline_imm_offset_i32() #0 {
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179 %alloca0 = alloca [128 x i32], align 4, addrspace(5)
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180 %alloca1 = alloca [8 x i32], align 4, addrspace(5)
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181 %gep0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca0, i32 0, i32 65
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182 %gep1 = getelementptr inbounds [8 x i32], [8 x i32] addrspace(5)* %alloca1, i32 0, i32 0
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183 store volatile i32 7, i32 addrspace(5)* %gep0
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184 %ptrtoint = ptrtoint i32 addrspace(5)* %gep1 to i32
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185 %mul = mul i32 %ptrtoint, 9
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186 store volatile i32 %mul, i32 addrspace(3)* undef
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187 ret void
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188 }
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189
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190 ; GCN-LABEL: {{^}}func_other_fi_user_non_inline_imm_offset_i32_vcc_live:
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173
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191
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150
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192 ; CI-DAG: s_movk_i32 [[OFFSET:s[0-9]+]], 0x200
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173
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193 ; CI-DAG: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s32, 6
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150
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194 ; CI: v_add_i32_e64 [[VZ:v[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, [[OFFSET]], [[SCALED]]
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195
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173
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196 ; GFX9-DAG: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, s32
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150
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197 ; GFX9: v_add_u32_e32 [[VZ:v[0-9]+]], 0x200, [[SCALED]]
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198
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199 ; GCN: v_mul_u32_u24_e32 [[VZ]], 9, [[VZ]]
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200 ; GCN: ds_write_b32 v0, [[VZ]]
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201 define void @func_other_fi_user_non_inline_imm_offset_i32_vcc_live() #0 {
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202 %alloca0 = alloca [128 x i32], align 4, addrspace(5)
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203 %alloca1 = alloca [8 x i32], align 4, addrspace(5)
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204 %vcc = call i64 asm sideeffect "; def $0", "={vcc}"()
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205 %gep0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca0, i32 0, i32 65
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206 %gep1 = getelementptr inbounds [8 x i32], [8 x i32] addrspace(5)* %alloca1, i32 0, i32 0
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207 store volatile i32 7, i32 addrspace(5)* %gep0
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208 call void asm sideeffect "; use $0", "{vcc}"(i64 %vcc)
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209 %ptrtoint = ptrtoint i32 addrspace(5)* %gep1 to i32
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210 %mul = mul i32 %ptrtoint, 9
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211 store volatile i32 %mul, i32 addrspace(3)* undef
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212 ret void
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213 }
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214
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215 declare void @func(<4 x float> addrspace(5)* nocapture) #0
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216
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217 ; undef flag not preserved in eliminateFrameIndex when handling the
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218 ; stores in the middle block.
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219
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220 ; GCN-LABEL: {{^}}undefined_stack_store_reg:
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221 ; GCN: s_and_saveexec_b64
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173
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222 ; GCN: buffer_store_dword v0, off, s[0:3], s33 offset:
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223 ; GCN: buffer_store_dword v0, off, s[0:3], s33 offset:
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224 ; GCN: buffer_store_dword v0, off, s[0:3], s33 offset:
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225 ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s33 offset:
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150
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226 define void @undefined_stack_store_reg(float %arg, i32 %arg1) #0 {
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227 bb:
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228 %tmp = alloca <4 x float>, align 16, addrspace(5)
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229 %tmp2 = insertelement <4 x float> undef, float %arg, i32 0
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230 store <4 x float> %tmp2, <4 x float> addrspace(5)* undef
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231 %tmp3 = icmp eq i32 %arg1, 0
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232 br i1 %tmp3, label %bb4, label %bb5
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233
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234 bb4:
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235 call void @func(<4 x float> addrspace(5)* nonnull undef)
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236 store <4 x float> %tmp2, <4 x float> addrspace(5)* %tmp, align 16
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237 call void @func(<4 x float> addrspace(5)* nonnull %tmp)
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238 br label %bb5
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239
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240 bb5:
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241 ret void
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242 }
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243
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244 ; GCN-LABEL: {{^}}alloca_ptr_nonentry_block:
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245 ; GCN: s_and_saveexec_b64
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246 ; GCN: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32 offset:4
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247
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173
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248 ; CI: v_lshr_b32_e64 [[SHIFT:v[0-9]+]], s32, 6
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150
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249 ; CI-NEXT: v_or_b32_e32 [[PTR:v[0-9]+]], 4, [[SHIFT]]
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250
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173
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251 ; GFX9: v_lshrrev_b32_e64 [[SHIFT:v[0-9]+]], 6, s32
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150
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252 ; GFX9-NEXT: v_or_b32_e32 [[PTR:v[0-9]+]], 4, [[SHIFT]]
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253
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254 ; GCN: ds_write_b32 v{{[0-9]+}}, [[PTR]]
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255 define void @alloca_ptr_nonentry_block(i32 %arg0) #0 {
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256 %alloca0 = alloca { i8, i32 }, align 4, addrspace(5)
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257 %cmp = icmp eq i32 %arg0, 0
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258 br i1 %cmp, label %bb, label %ret
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259
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260 bb:
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261 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %alloca0, i32 0, i32 0
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262 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %alloca0, i32 0, i32 1
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263 %load1 = load volatile i32, i32 addrspace(5)* %gep1
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264 store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef
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265 br label %ret
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266
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267 ret:
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268 ret void
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269 }
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270
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271 attributes #0 = { nounwind }
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