150
|
1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,FUNC %s
|
|
2 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,FUNC %s
|
|
3 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,FUNC %s
|
|
4 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,FUNC %s
|
|
5
|
|
6 ; FUNC-LABEL: {{^}}atomic_add_ret_gds:
|
|
7 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
8 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
9 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
10 define amdgpu_kernel void @atomic_add_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
11 %val = atomicrmw volatile add i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
12 store i32 %val, i32 addrspace(1)* %out
|
|
13 ret void
|
|
14 }
|
|
15
|
|
16 ; FUNC-LABEL: {{^}}atomic_add_ret_gds_const_offset:
|
|
17 ; GCN: s_movk_i32 m0, 0x80
|
|
18 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20 gds
|
|
19 define amdgpu_kernel void @atomic_add_ret_gds_const_offset(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #0 {
|
|
20 %gep = getelementptr i32, i32 addrspace(2)* %gds, i32 5
|
|
21 %val = atomicrmw volatile add i32 addrspace(2)* %gep, i32 5 acq_rel
|
|
22 store i32 %val, i32 addrspace(1)* %out
|
|
23 ret void
|
|
24 }
|
|
25
|
|
26 ; FUNC-LABEL: {{^}}atomic_sub_ret_gds:
|
|
27 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
28 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
29 ; GCN: ds_sub_rtn_u32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
30 define amdgpu_kernel void @atomic_sub_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
31 %val = atomicrmw sub i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
32 store i32 %val, i32 addrspace(1)* %out
|
|
33 ret void
|
|
34 }
|
|
35
|
|
36 ; FUNC-LABEL: {{^}}atomic_and_ret_gds:
|
|
37 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
38 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
39 ; GCN: ds_and_rtn_b32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
40 define amdgpu_kernel void @atomic_and_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
41 %val = atomicrmw and i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
42 store i32 %val, i32 addrspace(1)* %out
|
|
43 ret void
|
|
44 }
|
|
45
|
|
46 ; FUNC-LABEL: {{^}}atomic_or_ret_gds:
|
|
47 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
48 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
49 ; GCN: ds_or_rtn_b32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
50 define amdgpu_kernel void @atomic_or_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
51 %val = atomicrmw or i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
52 store i32 %val, i32 addrspace(1)* %out
|
|
53 ret void
|
|
54 }
|
|
55
|
|
56 ; FUNC-LABEL: {{^}}atomic_xor_ret_gds:
|
|
57 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
58 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
59 ; GCN: ds_xor_rtn_b32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
60 define amdgpu_kernel void @atomic_xor_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
61 %val = atomicrmw xor i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
62 store i32 %val, i32 addrspace(1)* %out
|
|
63 ret void
|
|
64 }
|
|
65
|
|
66 ; FUNC-LABEL: {{^}}atomic_umin_ret_gds:
|
|
67 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
68 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
69 ; GCN: ds_min_rtn_u32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
70 define amdgpu_kernel void @atomic_umin_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
71 %val = atomicrmw umin i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
72 store i32 %val, i32 addrspace(1)* %out
|
|
73 ret void
|
|
74 }
|
|
75
|
|
76 ; FUNC-LABEL: {{^}}atomic_umax_ret_gds:
|
|
77 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
78 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
79 ; GCN: ds_max_rtn_u32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
80 define amdgpu_kernel void @atomic_umax_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
81 %val = atomicrmw umax i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
82 store i32 %val, i32 addrspace(1)* %out
|
|
83 ret void
|
|
84 }
|
|
85
|
|
86 ; FUNC-LABEL: {{^}}atomic_imin_ret_gds:
|
|
87 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
88 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
89 ; GCN: ds_min_rtn_i32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
90 define amdgpu_kernel void @atomic_imin_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
91 %val = atomicrmw min i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
92 store i32 %val, i32 addrspace(1)* %out
|
|
93 ret void
|
|
94 }
|
|
95
|
|
96 ; FUNC-LABEL: {{^}}atomic_imax_ret_gds:
|
|
97 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
98 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
99 ; GCN: ds_max_rtn_i32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
100 define amdgpu_kernel void @atomic_imax_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
101 %val = atomicrmw max i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
102 store i32 %val, i32 addrspace(1)* %out
|
|
103 ret void
|
|
104 }
|
|
105
|
|
106 ; FUNC-LABEL: {{^}}atomic_xchg_ret_gds:
|
|
107 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
108 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
109 ; GCN: ds_wrxchg_rtn_b32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
|
|
110 define amdgpu_kernel void @atomic_xchg_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
111 %val = atomicrmw xchg i32 addrspace(2)* %gds, i32 5 acq_rel
|
|
112 store i32 %val, i32 addrspace(1)* %out
|
|
113 ret void
|
|
114 }
|
|
115
|
|
116 ; FUNC-LABEL: {{^}}atomic_cmpxchg_ret_gds:
|
|
117 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
|
|
118 ; GCN-DAG: s_movk_i32 m0, 0x1000
|
|
119 ; GCN: ds_cmpst_rtn_b32 v{{[0-9]+}}, v[[OFF:[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}} gds
|
|
120 define amdgpu_kernel void @atomic_cmpxchg_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
|
|
121 %val = cmpxchg i32 addrspace(2)* %gds, i32 0, i32 1 acquire acquire
|
|
122 %x = extractvalue { i32, i1 } %val, 0
|
|
123 store i32 %x, i32 addrspace(1)* %out
|
|
124 ret void
|
|
125 }
|
|
126
|
|
127 attributes #0 = { nounwind "amdgpu-gds-size"="128" }
|
|
128 attributes #1 = { nounwind "amdgpu-gds-size"="4096" }
|