annotate llvm/test/CodeGen/AMDGPU/gds-atomic.ll @ 206:f17a3b42b08b

Added tag before-12 for changeset b7591485f4cd
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 07 Jun 2021 21:25:57 +0900
parents 1d019706d866
children 1f2b6ac9f198
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,FUNC %s
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2 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,FUNC %s
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3 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,FUNC %s
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4 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,FUNC %s
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5
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6 ; FUNC-LABEL: {{^}}atomic_add_ret_gds:
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7 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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8 ; GCN-DAG: s_movk_i32 m0, 0x1000
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9 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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10 define amdgpu_kernel void @atomic_add_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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11 %val = atomicrmw volatile add i32 addrspace(2)* %gds, i32 5 acq_rel
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12 store i32 %val, i32 addrspace(1)* %out
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13 ret void
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14 }
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15
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16 ; FUNC-LABEL: {{^}}atomic_add_ret_gds_const_offset:
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17 ; GCN: s_movk_i32 m0, 0x80
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18 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20 gds
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19 define amdgpu_kernel void @atomic_add_ret_gds_const_offset(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #0 {
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20 %gep = getelementptr i32, i32 addrspace(2)* %gds, i32 5
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21 %val = atomicrmw volatile add i32 addrspace(2)* %gep, i32 5 acq_rel
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22 store i32 %val, i32 addrspace(1)* %out
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23 ret void
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24 }
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25
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26 ; FUNC-LABEL: {{^}}atomic_sub_ret_gds:
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27 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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28 ; GCN-DAG: s_movk_i32 m0, 0x1000
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29 ; GCN: ds_sub_rtn_u32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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30 define amdgpu_kernel void @atomic_sub_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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31 %val = atomicrmw sub i32 addrspace(2)* %gds, i32 5 acq_rel
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32 store i32 %val, i32 addrspace(1)* %out
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33 ret void
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34 }
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35
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36 ; FUNC-LABEL: {{^}}atomic_and_ret_gds:
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37 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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38 ; GCN-DAG: s_movk_i32 m0, 0x1000
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39 ; GCN: ds_and_rtn_b32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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40 define amdgpu_kernel void @atomic_and_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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41 %val = atomicrmw and i32 addrspace(2)* %gds, i32 5 acq_rel
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42 store i32 %val, i32 addrspace(1)* %out
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43 ret void
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44 }
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45
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46 ; FUNC-LABEL: {{^}}atomic_or_ret_gds:
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47 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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48 ; GCN-DAG: s_movk_i32 m0, 0x1000
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49 ; GCN: ds_or_rtn_b32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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50 define amdgpu_kernel void @atomic_or_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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51 %val = atomicrmw or i32 addrspace(2)* %gds, i32 5 acq_rel
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52 store i32 %val, i32 addrspace(1)* %out
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53 ret void
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54 }
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55
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56 ; FUNC-LABEL: {{^}}atomic_xor_ret_gds:
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57 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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58 ; GCN-DAG: s_movk_i32 m0, 0x1000
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59 ; GCN: ds_xor_rtn_b32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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60 define amdgpu_kernel void @atomic_xor_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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61 %val = atomicrmw xor i32 addrspace(2)* %gds, i32 5 acq_rel
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62 store i32 %val, i32 addrspace(1)* %out
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63 ret void
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64 }
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65
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66 ; FUNC-LABEL: {{^}}atomic_umin_ret_gds:
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67 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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68 ; GCN-DAG: s_movk_i32 m0, 0x1000
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69 ; GCN: ds_min_rtn_u32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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70 define amdgpu_kernel void @atomic_umin_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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71 %val = atomicrmw umin i32 addrspace(2)* %gds, i32 5 acq_rel
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72 store i32 %val, i32 addrspace(1)* %out
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73 ret void
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74 }
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75
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76 ; FUNC-LABEL: {{^}}atomic_umax_ret_gds:
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77 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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78 ; GCN-DAG: s_movk_i32 m0, 0x1000
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79 ; GCN: ds_max_rtn_u32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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80 define amdgpu_kernel void @atomic_umax_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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81 %val = atomicrmw umax i32 addrspace(2)* %gds, i32 5 acq_rel
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82 store i32 %val, i32 addrspace(1)* %out
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83 ret void
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84 }
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85
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86 ; FUNC-LABEL: {{^}}atomic_imin_ret_gds:
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87 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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88 ; GCN-DAG: s_movk_i32 m0, 0x1000
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89 ; GCN: ds_min_rtn_i32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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90 define amdgpu_kernel void @atomic_imin_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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91 %val = atomicrmw min i32 addrspace(2)* %gds, i32 5 acq_rel
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92 store i32 %val, i32 addrspace(1)* %out
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93 ret void
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94 }
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95
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96 ; FUNC-LABEL: {{^}}atomic_imax_ret_gds:
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97 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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98 ; GCN-DAG: s_movk_i32 m0, 0x1000
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99 ; GCN: ds_max_rtn_i32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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100 define amdgpu_kernel void @atomic_imax_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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101 %val = atomicrmw max i32 addrspace(2)* %gds, i32 5 acq_rel
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102 store i32 %val, i32 addrspace(1)* %out
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103 ret void
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104 }
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105
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106 ; FUNC-LABEL: {{^}}atomic_xchg_ret_gds:
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107 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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108 ; GCN-DAG: s_movk_i32 m0, 0x1000
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109 ; GCN: ds_wrxchg_rtn_b32 v{{[0-9]+}}, v[[OFF]], v{{[0-9]+}} gds
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110 define amdgpu_kernel void @atomic_xchg_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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111 %val = atomicrmw xchg i32 addrspace(2)* %gds, i32 5 acq_rel
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112 store i32 %val, i32 addrspace(1)* %out
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113 ret void
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114 }
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115
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116 ; FUNC-LABEL: {{^}}atomic_cmpxchg_ret_gds:
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117 ; GCN-DAG: v_mov_b32_e32 v[[OFF:[0-9]+]], s
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118 ; GCN-DAG: s_movk_i32 m0, 0x1000
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119 ; GCN: ds_cmpst_rtn_b32 v{{[0-9]+}}, v[[OFF:[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}} gds
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120 define amdgpu_kernel void @atomic_cmpxchg_ret_gds(i32 addrspace(1)* %out, i32 addrspace(2)* %gds) #1 {
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121 %val = cmpxchg i32 addrspace(2)* %gds, i32 0, i32 1 acquire acquire
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122 %x = extractvalue { i32, i1 } %val, 0
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123 store i32 %x, i32 addrspace(1)* %out
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124 ret void
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125 }
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126
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127 attributes #0 = { nounwind "amdgpu-gds-size"="128" }
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128 attributes #1 = { nounwind "amdgpu-gds-size"="4096" }