annotate llvm/test/CodeGen/AMDGPU/llvm.r600.cube.ll @ 206:f17a3b42b08b

Added tag before-12 for changeset b7591485f4cd
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 07 Jun 2021 21:25:57 +0900
parents 1d019706d866
children 1f2b6ac9f198
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s
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2
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3 ; CHECK-LABEL: {{^}}cube:
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4 ; CHECK: CUBE T{{[0-9]}}.X
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5 ; CHECK: CUBE T{{[0-9]}}.Y
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6 ; CHECK: CUBE T{{[0-9]}}.Z
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7 ; CHECK: CUBE * T{{[0-9]}}.W
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8 define amdgpu_ps void @cube() {
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9 main_body:
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10 %tmp = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9)
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11 %tmp1 = extractelement <4 x float> %tmp, i32 3
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12 %tmp2 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9)
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13 %tmp3 = extractelement <4 x float> %tmp2, i32 0
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14 %tmp4 = fdiv float %tmp3, %tmp1
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15 %tmp5 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9)
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16 %tmp6 = extractelement <4 x float> %tmp5, i32 1
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17 %tmp7 = fdiv float %tmp6, %tmp1
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18 %tmp8 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9)
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19 %tmp9 = extractelement <4 x float> %tmp8, i32 2
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20 %tmp10 = fdiv float %tmp9, %tmp1
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21 %tmp11 = insertelement <4 x float> undef, float %tmp4, i32 0
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22 %tmp12 = insertelement <4 x float> %tmp11, float %tmp7, i32 1
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23 %tmp13 = insertelement <4 x float> %tmp12, float %tmp10, i32 2
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24 %tmp14 = insertelement <4 x float> %tmp13, float 1.000000e+00, i32 3
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25 %tmp15 = call <4 x float> @llvm.r600.cube(<4 x float> %tmp14)
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26 %tmp16 = extractelement <4 x float> %tmp15, i32 0
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27 %tmp17 = extractelement <4 x float> %tmp15, i32 1
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28 %tmp18 = extractelement <4 x float> %tmp15, i32 2
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29 %tmp19 = extractelement <4 x float> %tmp15, i32 3
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30 %tmp20 = call float @llvm.fabs.f32(float %tmp18)
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31 %tmp21 = fdiv float 1.000000e+00, %tmp20
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32 %tmp22 = fmul float %tmp16, %tmp21
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33 %tmp23 = fadd float %tmp22, 1.500000e+00
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34 %tmp24 = fmul float %tmp17, %tmp21
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35 %tmp25 = fadd float %tmp24, 1.500000e+00
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36 %tmp26 = insertelement <4 x float> undef, float %tmp25, i32 0
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37 %tmp27 = insertelement <4 x float> %tmp26, float %tmp23, i32 1
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38 %tmp28 = insertelement <4 x float> %tmp27, float %tmp19, i32 2
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39 %tmp29 = insertelement <4 x float> %tmp28, float %tmp25, i32 3
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40 %tmp30 = shufflevector <4 x float> %tmp29, <4 x float> %tmp29, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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41 %tmp31 = call <4 x float> @llvm.r600.tex(<4 x float> %tmp30, i32 0, i32 0, i32 0, i32 16, i32 0, i32 1, i32 1, i32 1, i32 1)
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42 call void @llvm.r600.store.swizzle(<4 x float> %tmp31, i32 0, i32 0)
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43 ret void
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44 }
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45
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46 ; Function Attrs: readnone
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47 declare <4 x float> @llvm.r600.cube(<4 x float>) #0
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48
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49 ; Function Attrs: nounwind readnone
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50 declare float @llvm.fabs.f32(float) #0
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51
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52 declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
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53
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54 ; Function Attrs: readnone
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55 declare <4 x float> @llvm.r600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) #0
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56
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57 attributes #0 = { nounwind readnone }