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annotate llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir @ 206:f17a3b42b08b

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Added tag before-12 for changeset b7591485f4cd
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 07 Jun 2021 21:25:57 +0900
parents 1d019706d866
children 2e18cbf3894f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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2 # RUN: llc -march=amdgcn -o - -run-pass=block-placement -mcpu=gfx1010 -mattr=-inst-fwd-prefetch-bug -verify-machineinstrs %s | FileCheck -check-prefix=GCN %s
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3
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4 # Used to fail with
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5 # Assertion `Out && "Header of loop has no predecessors from outside loop?"
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6
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7 ---
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8 name: loop_header_nopred
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9 body: |
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10 ; GCN-LABEL: name: loop_header_nopred
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11 ; GCN: bb.0:
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12 ; GCN: successors: %bb.1(0x80000000)
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13 ; GCN: S_INST_PREFETCH 1
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14 ; GCN: S_BRANCH %bb.1
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15 ; GCN: bb.6 (align 64):
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16 ; GCN: successors: %bb.7(0x04000000), %bb.1(0x7c000000)
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17 ; GCN: S_CBRANCH_VCCNZ %bb.7, implicit $vcc
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18 ; GCN: bb.1:
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19 ; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
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20 ; GCN: S_CBRANCH_VCCNZ %bb.2, implicit $vcc
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21 ; GCN: bb.3:
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22 ; GCN: successors: %bb.4(0x40000000), %bb.6(0x40000000)
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23 ; GCN: SI_MASK_BRANCH %bb.6, implicit $exec
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24 ; GCN: S_BRANCH %bb.4
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25 ; GCN: bb.2 (align 64):
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26 ; GCN: successors: %bb.4(0x40000000), %bb.6(0x40000000)
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27 ; GCN: SI_MASK_BRANCH %bb.6, implicit $exec
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28 ; GCN: S_BRANCH %bb.4
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29 ; GCN: bb.4:
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30 ; GCN: successors: %bb.5(0x04000000), %bb.4(0x7c000000)
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31 ; GCN: S_NOP 0
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32 ; GCN: S_NOP 0
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33 ; GCN: S_NOP 0
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34 ; GCN: S_NOP 0
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35 ; GCN: S_NOP 0
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36 ; GCN: S_NOP 0
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37 ; GCN: S_NOP 0
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38 ; GCN: S_NOP 0
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39 ; GCN: S_NOP 0
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40 ; GCN: S_NOP 0
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41 ; GCN: S_NOP 0
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42 ; GCN: S_CBRANCH_EXECZ %bb.4, implicit $exec
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43 ; GCN: bb.5:
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44 ; GCN: successors: %bb.6(0x80000000)
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45 ; GCN: S_BRANCH %bb.6
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46 ; GCN: bb.7:
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47 ; GCN: S_ENDPGM 0
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48 bb.0:
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49 successors: %bb.1(0x80000000)
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50
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51 bb.1:
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52 successors: %bb.2(0x40000000), %bb.3(0x40000000)
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53
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54 S_CBRANCH_VCCZ %bb.3, implicit $vcc
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55 S_BRANCH %bb.2
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56
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57 bb.2:
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58 successors: %bb.3(0x80000000)
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59
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60 bb.3:
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61 successors: %bb.4(0x40000000), %bb.6(0x40000000)
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62
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63 SI_MASK_BRANCH %bb.6, implicit $exec
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64 S_BRANCH %bb.4
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65
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66 bb.4:
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67 successors: %bb.5(0x04000000), %bb.4(0x7c000000)
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68
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69 S_NOP 0
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70 S_NOP 0
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71 S_NOP 0
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72 S_NOP 0
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73 S_NOP 0
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74 S_NOP 0
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75 S_NOP 0
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76 S_NOP 0
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77 S_NOP 0
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78 S_NOP 0
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79 S_NOP 0
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80 S_CBRANCH_EXECZ %bb.4, implicit $exec
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81
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82 bb.5:
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83 successors: %bb.6(0x80000000)
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84
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85 bb.6:
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86 successors: %bb.7(0x04000000), %bb.1(0x7c000000)
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87
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88 S_CBRANCH_VCCZ %bb.1, implicit $vcc
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89
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90 bb.7:
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91 S_ENDPGM 0
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92 ...