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1 ; RUN: llc -march=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX8 %s
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2 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
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3 ; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX10 %s
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4
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5 ; FIXME: GFX9 should be producing v_mad_u16 instead of v_mad_legacy_u16.
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6
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7 ; GCN-LABEL: {{^}}mad_u16
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8 ; GCN: {{flat|global}}_load_ushort v[[A:[0-9]+]]
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9 ; GCN: {{flat|global}}_load_ushort v[[B:[0-9]+]]
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10 ; GCN: {{flat|global}}_load_ushort v[[C:[0-9]+]]
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11 ; GFX8: v_mad_u16 v[[R:[0-9]+]], v[[A]], v[[B]], v[[C]]
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12 ; GFX9: v_mad_legacy_u16 v[[R:[0-9]+]], v[[A]], v[[B]], v[[C]]
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13 ; GFX10: v_mad_u16 v[[R:[0-9]+]], v[[A]], v[[B]], v[[C]]
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14 ; GCN: {{flat|global}}_store_short v{{\[[0-9]+:[0-9]+\]}}, v[[R]]
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15 ; GCN: s_endpgm
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16 define amdgpu_kernel void @mad_u16(
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17 i16 addrspace(1)* %r,
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18 i16 addrspace(1)* %a,
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19 i16 addrspace(1)* %b,
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20 i16 addrspace(1)* %c) {
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21 entry:
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22 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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23 %a.gep = getelementptr inbounds i16, i16 addrspace(1)* %a, i32 %tid
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24 %b.gep = getelementptr inbounds i16, i16 addrspace(1)* %b, i32 %tid
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25 %c.gep = getelementptr inbounds i16, i16 addrspace(1)* %c, i32 %tid
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26
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27 %a.val = load volatile i16, i16 addrspace(1)* %a.gep
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28 %b.val = load volatile i16, i16 addrspace(1)* %b.gep
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29 %c.val = load volatile i16, i16 addrspace(1)* %c.gep
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30
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31 %m.val = mul i16 %a.val, %b.val
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32 %r.val = add i16 %m.val, %c.val
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33
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34 store i16 %r.val, i16 addrspace(1)* %r
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35 ret void
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36 }
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37
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38 declare i32 @llvm.amdgcn.workitem.id.x()
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