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150
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1 ; RUN: llc -march=amdgcn -mcpu=kaveri -mtriple=amdgcn-unknown-amdhsa -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCN %s
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2
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3 ; Check that when mubuf addr64 instruction is handled in moveToVALU
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4 ; from the pointer, dead register writes are not emitted.
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5
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6 ; FIXME: We should be able to use the SGPR directly as src0 to v_add_i32
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7
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8 ; GCN-LABEL: {{^}}clobber_vgpr_pair_pointer_add:
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9 ; GCN: s_load_dwordx2 s{{\[}}[[ARG1LO:[0-9]+]]:[[ARG1HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x0{{$}}
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10
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11 ; GCN-NOT: v_mov_b32
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12 ; GCN: v_mov_b32_e32 v[[VARG1LO:[0-9]+]], s[[ARG1LO]]
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13 ; GCN: buffer_load_dwordx2 v{{\[}}[[LDPTRLO:[0-9]+]]:[[LDPTRHI:[0-9]+]]{{\]}}
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14 ; GCN-NOT: v_mov_b32
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15 ; GCN: v_mov_b32_e32 v[[VARG1HI:[0-9]+]], s[[ARG1HI]]
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16 ; GCN-NOT: v_mov_b32
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17
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18 ; GCN: v_add_i32_e32 v[[PTRLO:[0-9]+]], vcc, v[[LDPTRLO]], v[[VARG1LO]]
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19 ; GCN: v_addc_u32_e32 v[[PTRHI:[0-9]+]], vcc, v[[LDPTRHI]], v[[VARG1HI]]
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20 ; GCN: buffer_load_ubyte v{{[0-9]+}}, v{{\[}}[[PTRLO]]:[[PTRHI]]{{\]}},
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21
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22 define amdgpu_kernel void @clobber_vgpr_pair_pointer_add(i64 %arg1, [8 x i32], i8 addrspace(1)* addrspace(1)* %ptrarg, i32 %arg3) #0 {
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23 bb:
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24 %tmp = icmp sgt i32 %arg3, 0
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25 br i1 %tmp, label %bb4, label %bb17
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26
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27 bb4:
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28 %tmp14 = load volatile i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* %ptrarg
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29 %tmp15 = getelementptr inbounds i8, i8 addrspace(1)* %tmp14, i64 %arg1
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30 %tmp16 = load volatile i8, i8 addrspace(1)* %tmp15
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31 br label %bb17
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32
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33 bb17:
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34 ret void
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35 }
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36
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37 attributes #0 = { nounwind }
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