Mercurial > hg > CbC > CbC_llvm

annotate llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir @ 206:f17a3b42b08b

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Added tag before-12 for changeset b7591485f4cd
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 07 Jun 2021 21:25:57 +0900
parents 1d019706d866
children 2e18cbf3894f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
150
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1 # RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass si-load-store-opt -o - %s | FileCheck -check-prefix=GFX9 %s
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2
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3 # GFX9-LABEL: name: diffoporder_add
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4 # GFX9: %{{[0-9]+}}:vreg_64 = GLOBAL_LOAD_DWORDX2 %{{[0-9]+}}, -2048, 0, 0
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5 # GFX9: %{{[0-9]+}}:vreg_64 = GLOBAL_LOAD_DWORDX2 %{{[0-9]+}}, 0, 0, 0
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6
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7 name: diffoporder_add
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8 body: |
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9 bb.0.entry:
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10 %0:sgpr_64 = COPY $sgpr0_sgpr1
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11 %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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12 %3:sgpr_128 = COPY $sgpr96_sgpr97_sgpr98_sgpr99
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13 %4:sreg_32_xm0 = COPY $sgpr101
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14 %5:sreg_32_xm0 = S_MOV_B32 0
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15 $sgpr0_sgpr1_sgpr2_sgpr3 = COPY %3
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16 $sgpr4 = COPY %4
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17 $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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18 %6:vreg_64 = COPY $vgpr0_vgpr1
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19 %7:vgpr_32 = V_AND_B32_e32 255, %6.sub0, implicit $exec
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20 %8:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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21 %9:vreg_64 = REG_SEQUENCE killed %7, %subreg.sub0, %8, %subreg.sub1
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22 %10:vgpr_32 = V_LSHLREV_B32_e64 7, %6.sub0, implicit $exec
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23 %11:vgpr_32 = V_AND_B32_e32 -32768, killed %10, implicit $exec
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24 %12:sgpr_32 = COPY %1.sub1
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25 %13:vgpr_32 = COPY %5
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26 %14:vgpr_32, %15:sreg_64_xexec = V_ADD_I32_e64 %1.sub0, %11, 0, implicit $exec
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27 %16:vgpr_32 = COPY %12
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28 %17:vgpr_32, dead %18:sreg_64_xexec = V_ADDC_U32_e64 %16, %13, killed %15, 0, implicit $exec
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29 %19:vreg_64 = REG_SEQUENCE %14, %subreg.sub0, %17, %subreg.sub1
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30 %20:vreg_64 = V_LSHLREV_B64 3, %9, implicit $exec
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31 %21:vgpr_32, %22:sreg_64_xexec = V_ADD_I32_e64 %14, %20.sub0, 0, implicit $exec
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32 %23:vgpr_32, dead %24:sreg_64_xexec = V_ADDC_U32_e64 %17, %20.sub1, killed %22, 0, implicit $exec
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33 %25:sgpr_32 = S_MOV_B32 4096
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34 %26:vgpr_32, %27:sreg_64_xexec = V_ADD_I32_e64 %25, %21, 0, implicit $exec
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35 %28:vgpr_32, dead %29:sreg_64_xexec = V_ADDC_U32_e64 %23, 0, killed %27, 0, implicit $exec
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36 %30:vreg_64 = REG_SEQUENCE %26, %subreg.sub0, %28, %subreg.sub1
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37 %31:vreg_64 = GLOBAL_LOAD_DWORDX2 %30, 0, 0, 0, 0, implicit $exec
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38 %32:sgpr_32 = S_MOV_B32 6144
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39 %33:vgpr_32, %34:sreg_64_xexec = V_ADD_I32_e64 %21, %32, 0, implicit $exec
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40 %35:vgpr_32, dead %36:sreg_64_xexec = V_ADDC_U32_e64 %23, 0, killed %34, 0, implicit $exec
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41 %37:vreg_64 = REG_SEQUENCE %33, %subreg.sub0, %35, %subreg.sub1
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42 %38:vreg_64 = GLOBAL_LOAD_DWORDX2 %37, 0, 0, 0, 0, implicit $exec
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43 ...
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44 ---
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45
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46 # GFX9-LABEL: name: LowestInMiddle
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47 # GFX9: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 11200
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48 # GFX9: [[BASE_LO:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_5:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 %{{[0-9]+}}, [[S_MOV_B32_1]]
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49 # GFX9: [[BASE_HI:%[0-9]+]]:vgpr_32, dead %{{[0-9]+}}:sreg_64_xexec = V_ADDC_U32_e64 %{{[0-9]+}}, 0, killed [[V_ADD_I32_e64_5]]
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50 # GFX9: [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[BASE_LO]], %subreg.sub0, [[BASE_HI]], %subreg.sub1
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51 # GFX9: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 [[REG_SEQUENCE2]], -3200, 0, 0
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52 #
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53 # GFX9: [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 6400
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54 # GFX9: [[BASE1_LO:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_7:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 %{{[0-9]+}}, [[S_MOV_B32_2]]
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55 # GFX9: [[BASE1_HI:%[0-9]+]]:vgpr_32, dead %{{[0-9]+}}:sreg_64_xexec = V_ADDC_U32_e64 %{{[0-9]+}}, 0, killed [[V_ADD_I32_e64_7]]
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56 # GFX9: [[REG_SEQUENCE3:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[BASE1_LO]], %subreg.sub0, [[BASE1_HI]], %subreg.sub1
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57 # GFX9: [[GLOBAL_LOAD_DWORDX2_1:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 [[REG_SEQUENCE3]], 0, 0, 0,
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58 # GFX9: [[GLOBAL_LOAD_DWORDX2_2:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 [[REG_SEQUENCE2]], 0, 0, 0,
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59
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60 name: LowestInMiddle
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61 body: |
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62 bb.0.entry:
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63 %0:sgpr_64 = COPY $sgpr0_sgpr1
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64 %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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65 %3:sgpr_128 = COPY $sgpr96_sgpr97_sgpr98_sgpr99
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66 %4:sreg_32_xm0 = COPY $sgpr101
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67 %5:sreg_32_xm0 = S_MOV_B32 0
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68 $sgpr0_sgpr1_sgpr2_sgpr3 = COPY %3
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69 $sgpr4 = COPY %4
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70 $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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71 %6:vreg_64 = COPY $vgpr0_vgpr1
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72 %7:vgpr_32 = V_AND_B32_e32 255, %6.sub0, implicit $exec
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73 %8:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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74 %9:vreg_64 = REG_SEQUENCE killed %7, %subreg.sub0, %8, %subreg.sub1
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75 %10:vgpr_32 = V_LSHLREV_B32_e64 7, %6.sub0, implicit $exec
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76 %11:vgpr_32 = V_AND_B32_e32 -32768, killed %10, implicit $exec
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77 %12:sgpr_32 = COPY %1.sub1
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78 %13:vgpr_32 = COPY %5
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79 %14:vgpr_32, %15:sreg_64_xexec = V_ADD_I32_e64 %1.sub0, %11, 0, implicit $exec
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80 %16:vgpr_32 = COPY %12
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81 %17:vgpr_32, dead %18:sreg_64_xexec = V_ADDC_U32_e64 %16, %13, killed %15, 0, implicit $exec
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82 %19:vreg_64 = REG_SEQUENCE %14, %subreg.sub0, %17, %subreg.sub1
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83 %20:vreg_64 = V_LSHLREV_B64 3, %9, implicit $exec
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84 %21:vgpr_32, %22:sreg_64_xexec = V_ADD_I32_e64 %14, %20.sub0, 0, implicit $exec
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85 %23:vgpr_32, dead %24:sreg_64_xexec = V_ADDC_U32_e64 %17, %20.sub1, killed %22, 0, implicit $exec
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86 %25:sgpr_32 = S_MOV_B32 8000
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87 %26:vgpr_32, %27:sreg_64_xexec = V_ADD_I32_e64 %21, %25, 0, implicit $exec
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88 %28:vgpr_32, dead %29:sreg_64_xexec = V_ADDC_U32_e64 %23, 0, killed %27, 0, implicit $exec
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89 %30:vreg_64 = REG_SEQUENCE %26, %subreg.sub0, %28, %subreg.sub1
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90 %31:vreg_64 = GLOBAL_LOAD_DWORDX2 %30, 0, 0, 0, 0, implicit $exec
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91 %32:sgpr_32 = S_MOV_B32 6400
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92 %33:vgpr_32, %34:sreg_64_xexec = V_ADD_I32_e64 %21, %32, 0, implicit $exec
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93 %35:vgpr_32, dead %36:sreg_64_xexec = V_ADDC_U32_e64 %23, 0, killed %34, 0, implicit $exec
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94 %37:vreg_64 = REG_SEQUENCE %33, %subreg.sub0, %35, %subreg.sub1
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95 %38:vreg_64 = GLOBAL_LOAD_DWORDX2 %37, 0, 0, 0, 0, implicit $exec
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96 %39:sgpr_32 = S_MOV_B32 11200
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97 %40:vgpr_32, %41:sreg_64_xexec = V_ADD_I32_e64 %21, %39, 0, implicit $exec
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98 %42:vgpr_32, dead %43:sreg_64_xexec = V_ADDC_U32_e64 %23, 0, killed %41, 0, implicit $exec
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99 %44:vreg_64 = REG_SEQUENCE %40, %subreg.sub0, %42, %subreg.sub1
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100 %45:vreg_64 = GLOBAL_LOAD_DWORDX2 %44, 0, 0, 0, 0, implicit $exec
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101 ...
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102 ---
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103
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104 # GFX9-LABEL: name: NegativeDistance
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105 # GFX9: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 10240
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106 # GFX9: [[V_ADD_I32_e64_4:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_5:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 %{{[0-9]+}}, [[S_MOV_B32_1]]
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107 # GFX9: [[BASE_HI:%[0-9]+]]:vgpr_32, dead %{{[0-9]+}}:sreg_64_xexec = V_ADDC_U32_e64 %{{[0-9]+}}, 0, killed [[V_ADD_I32_e64_5]]
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108 # GFX9: [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_4]], %subreg.sub0, [[BASE_HI]], %subreg.sub1
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109 # GFX9: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 [[REG_SEQUENCE2]], -4096, 0, 0
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110 # GFX9: [[GLOBAL_LOAD_DWORDX2_1:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 [[REG_SEQUENCE2]], -2048, 0, 0
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111 # GFX9: [[GLOBAL_LOAD_DWORDX2_2:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 [[REG_SEQUENCE2]], 0, 0, 0
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112
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113 name: NegativeDistance
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114 body: |
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115 bb.0.entry:
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116 %0:sgpr_64 = COPY $sgpr0_sgpr1
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117 %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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118 %3:sgpr_128 = COPY $sgpr96_sgpr97_sgpr98_sgpr99
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119 %4:sreg_32_xm0 = COPY $sgpr101
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120 %5:sreg_32_xm0 = S_MOV_B32 0
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121 $sgpr0_sgpr1_sgpr2_sgpr3 = COPY %3
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122 $sgpr4 = COPY %4
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123 $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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124 %6:vreg_64 = COPY $vgpr0_vgpr1
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125 %7:vgpr_32 = V_AND_B32_e32 255, %6.sub0, implicit $exec
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126 %8:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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127 %9:vreg_64 = REG_SEQUENCE killed %7, %subreg.sub0, %8, %subreg.sub1
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128 %10:vgpr_32 = V_LSHLREV_B32_e64 7, %6.sub0, implicit $exec
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129 %11:vgpr_32 = V_AND_B32_e32 -32768, killed %10, implicit $exec
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130 %12:sgpr_32 = COPY %1.sub1
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131 %13:vgpr_32 = COPY %5
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132 %14:vgpr_32, %15:sreg_64_xexec = V_ADD_I32_e64 %1.sub0, %11, 0, implicit $exec
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133 %16:vgpr_32 = COPY %12
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134 %17:vgpr_32, dead %18:sreg_64_xexec = V_ADDC_U32_e64 %16, %13, killed %15, 0, implicit $exec
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135 %19:vreg_64 = REG_SEQUENCE %14, %subreg.sub0, %17, %subreg.sub1
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136 %20:vreg_64 = V_LSHLREV_B64 3, %9, implicit $exec
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137 %21:vgpr_32, %22:sreg_64_xexec = V_ADD_I32_e64 %14, %20.sub0, 0, implicit $exec
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138 %23:vgpr_32, dead %24:sreg_64_xexec = V_ADDC_U32_e64 %17, %20.sub1, killed %22, 0, implicit $exec
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139 %25:sgpr_32 = S_MOV_B32 6144
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140 %26:vgpr_32, %27:sreg_64_xexec = V_ADD_I32_e64 %21, %25, 0, implicit $exec
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141 %28:vgpr_32, dead %29:sreg_64_xexec = V_ADDC_U32_e64 %23, 0, killed %27, 0, implicit $exec
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142 %30:vreg_64 = REG_SEQUENCE %26, %subreg.sub0, %28, %subreg.sub1
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143 %31:vreg_64 = GLOBAL_LOAD_DWORDX2 %30, 0, 0, 0, 0, implicit $exec
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144 %32:sgpr_32 = S_MOV_B32 8192
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145 %33:vgpr_32, %34:sreg_64_xexec = V_ADD_I32_e64 %21, %32, 0, implicit $exec
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146 %35:vgpr_32, dead %36:sreg_64_xexec = V_ADDC_U32_e64 %23, 0, killed %34, 0, implicit $exec
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147 %37:vreg_64 = REG_SEQUENCE %33, %subreg.sub0, %35, %subreg.sub1
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148 %38:vreg_64 = GLOBAL_LOAD_DWORDX2 %37, 0, 0, 0, 0, implicit $exec
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149 %39:sgpr_32 = S_MOV_B32 10240
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150 %40:vgpr_32, %41:sreg_64_xexec = V_ADD_I32_e64 %21, %39, 0, implicit $exec
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151 %42:vgpr_32, dead %43:sreg_64_xexec = V_ADDC_U32_e64 %23, 0, killed %41, 0, implicit $exec
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152 %44:vreg_64 = REG_SEQUENCE %40, %subreg.sub0, %42, %subreg.sub1
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153 %45:vreg_64 = GLOBAL_LOAD_DWORDX2 %44, 0, 0, 0, 0, implicit $exec
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154 ...
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155 ---
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156
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157 # Tests for a successful compilation.
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158 name: assert_hit
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159 body: |
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160 bb.0.entry:
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161 %0:sgpr_64 = COPY $sgpr0_sgpr1
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162 %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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163 %3:sgpr_128 = COPY $sgpr96_sgpr97_sgpr98_sgpr99
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164 %4:sreg_32_xm0 = COPY $sgpr101
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165 %5:sreg_32_xm0 = S_MOV_B32 0
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166 $sgpr0_sgpr1_sgpr2_sgpr3 = COPY %3
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167 $sgpr4 = COPY %4
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168 $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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169 %6:vreg_64 = COPY $vgpr0_vgpr1
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170 %7:vgpr_32 = V_AND_B32_e32 255, %6.sub0, implicit $exec
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171 %8:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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172 %9:vreg_64 = REG_SEQUENCE killed %7, %subreg.sub0, %8, %subreg.sub1
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173 %10:vgpr_32 = V_LSHLREV_B32_e64 7, %6.sub0, implicit $exec
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174 %11:vgpr_32 = V_AND_B32_e32 -32768, killed %10, implicit $exec
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175 %12:sgpr_32 = COPY %1.sub1
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176 %13:vgpr_32 = COPY %5
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177 %14:vgpr_32, %15:sreg_64_xexec = V_ADD_I32_e64 %1.sub0, %11, 0, implicit $exec
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178 %16:vgpr_32 = COPY %12
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179 %17:vgpr_32, dead %18:sreg_64_xexec = V_ADDC_U32_e64 %16, %13, killed %15, 0, implicit $exec
anatofuz
parents:
diff changeset
180 %19:vreg_64 = REG_SEQUENCE %14, %subreg.sub0, %17, %subreg.sub1
anatofuz
parents:
diff changeset
181 %20:vreg_64 = V_LSHLREV_B64 3, %9, implicit $exec
anatofuz
parents:
diff changeset
182 %21:vgpr_32, %22:sreg_64_xexec = V_ADD_I32_e64 %14, %20.sub0, 0, implicit $exec
anatofuz
parents:
diff changeset
183 %23:vgpr_32, dead %24:sreg_64_xexec = V_ADDC_U32_e64 %17, %20.sub1, killed %22, 0, implicit $exec
anatofuz
parents:
diff changeset
184
anatofuz
parents:
diff changeset
185 %25:sgpr_32 = S_MOV_B32 6144
anatofuz
parents:
diff changeset
186 %26:vgpr_32, %27:sreg_64_xexec = V_ADD_I32_e64 %21, %25, 0, implicit $exec
anatofuz
parents:
diff changeset
187 %28:vgpr_32, dead %29:sreg_64_xexec = V_ADDC_U32_e64 %23, 4294967295, killed %27, 0, implicit $exec
anatofuz
parents:
diff changeset
188 %30:vreg_64 = REG_SEQUENCE %26, %subreg.sub0, %28, %subreg.sub1
anatofuz
parents:
diff changeset
189 %31:vreg_64 = GLOBAL_LOAD_DWORDX2 %30, 0, 0, 0, 0, implicit $exec
anatofuz
parents:
diff changeset
190 ...
anatofuz
parents:
diff changeset
191 ---
anatofuz
parents:
diff changeset
192
anatofuz
parents:
diff changeset
193 # GFX9-LABEL: name: diffoporder_add_store
anatofuz
parents:
diff changeset
194 # GFX9: GLOBAL_STORE_DWORD %{{[0-9]+}}, %0.sub0, 1000, 0, 0, 0
anatofuz
parents:
diff changeset
195 # GFX9: GLOBAL_STORE_DWORD %{{[0-9]+}}, %0.sub1, 0, 0, 0, 0
anatofuz
parents:
diff changeset
196
anatofuz
parents:
diff changeset
197 name: diffoporder_add_store
anatofuz
parents:
diff changeset
198 body: |
anatofuz
parents:
diff changeset
199 bb.0.entry:
anatofuz
parents:
diff changeset
200
anatofuz
parents:
diff changeset
201 %0:vreg_64 = COPY $vgpr0_vgpr1
anatofuz
parents:
diff changeset
202
anatofuz
parents:
diff changeset
203 %1:sgpr_32 = S_MOV_B32 4000
anatofuz
parents:
diff changeset
204 %2:vgpr_32, %3:sreg_64_xexec = V_ADD_I32_e64 %0.sub0, %1, 0, implicit $exec
anatofuz
parents:
diff changeset
205 %4:vgpr_32, dead %5:sreg_64_xexec = V_ADDC_U32_e64 %0.sub1, 0, %3, 0, implicit $exec
anatofuz
parents:
diff changeset
206 %6:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %4, %subreg.sub1
anatofuz
parents:
diff changeset
207 GLOBAL_STORE_DWORD %6, %0.sub0, 0, 0, 0, 0, implicit $exec
anatofuz
parents:
diff changeset
208
anatofuz
parents:
diff changeset
209 %8:sgpr_32 = S_MOV_B32 3000
anatofuz
parents:
diff changeset
210 %9:vgpr_32, %10:sreg_64_xexec = V_ADD_I32_e64 %0.sub0, %8, 0, implicit $exec
anatofuz
parents:
diff changeset
211 %11:vgpr_32, dead %12:sreg_64_xexec = V_ADDC_U32_e64 %0.sub1, 0, %10, 0, implicit $exec
anatofuz
parents:
diff changeset
212 %13:vreg_64 = REG_SEQUENCE %9, %subreg.sub0, %11, %subreg.sub1
anatofuz
parents:
diff changeset
213 GLOBAL_STORE_DWORD %13, %0.sub1, 0, 0, 0, 0, implicit $exec
anatofuz
parents:
diff changeset
214 ...