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150
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1 ; RUN: opt -loop-unroll -S -mtriple=amdgcn-- -mcpu=tahiti %s | FileCheck %s
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2
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3 ; This IR comes from this OpenCL C code:
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4 ;
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5 ; if (b + 4 > a) {
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6 ; for (int i = 0; i < 4; i++, b++) {
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7 ; if (b + 1 <= a)
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8 ; *(dst + c + b) = 0;
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9 ; else
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10 ; break;
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11 ; }
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12 ; }
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13 ;
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14 ; This test is meant to check that this loop isn't unrolled into more than
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15 ; four iterations. The loop unrolling preferences we currently use cause this
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16 ; loop to not be unrolled at all, but that may change in the future.
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17
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18 ; CHECK-LABEL: @test
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19 ; CHECK: store i8 0, i8 addrspace(1)*
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20 ; CHECK-NOT: store i8 0, i8 addrspace(1)*
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21 ; CHECK: ret void
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22 define amdgpu_kernel void @test(i8 addrspace(1)* nocapture %dst, i32 %a, i32 %b, i32 %c) {
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23 entry:
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24 %add = add nsw i32 %b, 4
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25 %cmp = icmp sgt i32 %add, %a
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26 br i1 %cmp, label %for.cond.preheader, label %if.end7
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27
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28 for.cond.preheader: ; preds = %entry
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29 %cmp313 = icmp slt i32 %b, %a
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30 br i1 %cmp313, label %if.then4.lr.ph, label %if.end7.loopexit
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31
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32 if.then4.lr.ph: ; preds = %for.cond.preheader
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33 %0 = sext i32 %c to i64
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34 br label %if.then4
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35
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36 if.then4: ; preds = %if.then4.lr.ph, %if.then4
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37 %i.015 = phi i32 [ 0, %if.then4.lr.ph ], [ %inc, %if.then4 ]
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38 %b.addr.014 = phi i32 [ %b, %if.then4.lr.ph ], [ %add2, %if.then4 ]
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39 %add2 = add nsw i32 %b.addr.014, 1
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40 %1 = sext i32 %b.addr.014 to i64
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41 %add.ptr.sum = add nsw i64 %1, %0
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42 %add.ptr5 = getelementptr inbounds i8, i8 addrspace(1)* %dst, i64 %add.ptr.sum
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43 store i8 0, i8 addrspace(1)* %add.ptr5, align 1
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44 %inc = add nsw i32 %i.015, 1
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45 %cmp1 = icmp slt i32 %inc, 4
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46 %cmp3 = icmp slt i32 %add2, %a
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47 %or.cond = and i1 %cmp3, %cmp1
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48 br i1 %or.cond, label %if.then4, label %for.cond.if.end7.loopexit_crit_edge
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49
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50 for.cond.if.end7.loopexit_crit_edge: ; preds = %if.then4
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51 br label %if.end7.loopexit
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52
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53 if.end7.loopexit: ; preds = %for.cond.if.end7.loopexit_crit_edge, %for.cond.preheader
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54 br label %if.end7
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55
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56 if.end7: ; preds = %if.end7.loopexit, %entry
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57 ret void
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58 }
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