annotate llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll @ 206:f17a3b42b08b

Added tag before-12 for changeset b7591485f4cd
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 07 Jun 2021 21:25:57 +0900
parents 1d019706d866
children 2e18cbf3894f
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150
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=FUNC %s
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2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=FUNC %s
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3
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4 ; FIXME: This should be merged with uint_to_fp.ll, but s_uint_to_fp_v2i64 crashes on r600
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5
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6 ; FUNC-LABEL: {{^}}s_uint_to_fp_i64_to_f16:
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7 define amdgpu_kernel void @s_uint_to_fp_i64_to_f16(half addrspace(1)* %out, i64 %in) #0 {
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8 %result = uitofp i64 %in to half
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9 store half %result, half addrspace(1)* %out
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10 ret void
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11 }
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12
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13 ; FUNC-LABEL: {{^}}v_uint_to_fp_i64_to_f16:
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14 ; GCN: {{buffer|flat}}_load_dwordx2
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15
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16 ; GCN: v_ffbh_u32
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17 ; GCN: v_ffbh_u32
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18 ; GCN: v_cndmask
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19 ; GCN: v_cndmask
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20
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21 ; GCN-DAG: v_cmp_eq_u64
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22 ; GCN-DAG: v_cmp_gt_u64
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23
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24 ; GCN: v_add_{{[iu]}}32_e32 [[VR:v[0-9]+]]
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25 ; GCN: v_cvt_f16_f32_e32 [[VR_F16:v[0-9]+]], [[VR]]
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26 ; GCN: {{buffer|flat}}_store_short {{.*}}[[VR_F16]]
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27 define amdgpu_kernel void @v_uint_to_fp_i64_to_f16(half addrspace(1)* %out, i64 addrspace(1)* %in) #0 {
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28 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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29 %in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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30 %out.gep = getelementptr half, half addrspace(1)* %out, i32 %tid
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31 %val = load i64, i64 addrspace(1)* %in.gep
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32 %result = uitofp i64 %val to half
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33 store half %result, half addrspace(1)* %out.gep
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34 ret void
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35 }
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36
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37 ; FUNC-LABEL: {{^}}s_uint_to_fp_i64_to_f32:
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38 define amdgpu_kernel void @s_uint_to_fp_i64_to_f32(float addrspace(1)* %out, i64 %in) #0 {
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39 %result = uitofp i64 %in to float
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40 store float %result, float addrspace(1)* %out
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41 ret void
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42 }
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43
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44 ; FUNC-LABEL: {{^}}v_uint_to_fp_i64_to_f32:
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45 ; GCN: {{buffer|flat}}_load_dwordx2
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46
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47 ; GCN: v_ffbh_u32
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48 ; GCN: v_ffbh_u32
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49 ; GCN: v_cndmask
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50 ; GCN: v_cndmask
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51
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52 ; GCN-DAG: v_cmp_eq_u64
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53 ; GCN-DAG: v_cmp_gt_u64
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54
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55 ; GCN: v_add_{{[iu]}}32_e32 [[VR:v[0-9]+]]
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56 ; GCN: {{buffer|flat}}_store_dword {{.*}}[[VR]]
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57 define amdgpu_kernel void @v_uint_to_fp_i64_to_f32(float addrspace(1)* %out, i64 addrspace(1)* %in) #0 {
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58 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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59 %in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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60 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid
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61 %val = load i64, i64 addrspace(1)* %in.gep
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62 %result = uitofp i64 %val to float
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63 store float %result, float addrspace(1)* %out.gep
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64 ret void
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65 }
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66
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67 ; FUNC-LABEL: {{^}}s_uint_to_fp_v2i64_to_v2f32:
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68 define amdgpu_kernel void @s_uint_to_fp_v2i64_to_v2f32(<2 x float> addrspace(1)* %out, <2 x i64> %in) #0{
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69 %result = uitofp <2 x i64> %in to <2 x float>
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70 store <2 x float> %result, <2 x float> addrspace(1)* %out
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71 ret void
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72 }
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73
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74 ; FUNC-LABEL: {{^}}v_uint_to_fp_v4i64_to_v4f32:
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75 define amdgpu_kernel void @v_uint_to_fp_v4i64_to_v4f32(<4 x float> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) #0 {
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76 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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77 %in.gep = getelementptr <4 x i64>, <4 x i64> addrspace(1)* %in, i32 %tid
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78 %out.gep = getelementptr <4 x float>, <4 x float> addrspace(1)* %out, i32 %tid
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79 %value = load <4 x i64>, <4 x i64> addrspace(1)* %in.gep
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80 %result = uitofp <4 x i64> %value to <4 x float>
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81 store <4 x float> %result, <4 x float> addrspace(1)* %out.gep
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82 ret void
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83 }
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84
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85 ; FUNC-LABEL: {{^}}s_uint_to_fp_v2i64_to_v2f16:
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86 define amdgpu_kernel void @s_uint_to_fp_v2i64_to_v2f16(<2 x half> addrspace(1)* %out, <2 x i64> %in) #0{
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87 %result = uitofp <2 x i64> %in to <2 x half>
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88 store <2 x half> %result, <2 x half> addrspace(1)* %out
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89 ret void
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90 }
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91
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92 ; FUNC-LABEL: {{^}}v_uint_to_fp_v4i64_to_v4f16:
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93 define amdgpu_kernel void @v_uint_to_fp_v4i64_to_v4f16(<4 x half> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) #0 {
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94 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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95 %in.gep = getelementptr <4 x i64>, <4 x i64> addrspace(1)* %in, i32 %tid
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96 %out.gep = getelementptr <4 x half>, <4 x half> addrspace(1)* %out, i32 %tid
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97 %value = load <4 x i64>, <4 x i64> addrspace(1)* %in.gep
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98 %result = uitofp <4 x i64> %value to <4 x half>
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99 store <4 x half> %result, <4 x half> addrspace(1)* %out.gep
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100 ret void
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101 }
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102
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103 declare i32 @llvm.amdgcn.workitem.id.x() #1
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104
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105 attributes #0 = { nounwind }
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106 attributes #1 = { nounwind readnone }