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1 ; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -amdgpu-promote-alloca -sroa -instcombine < %s | FileCheck -check-prefix=OPT %s
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2
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3 ; Show that what the alloca promotion pass will do for non-atomic load/store.
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4
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5 ; OPT-LABEL: @vector_alloca_not_atomic(
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6 ;
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7 ; OPT: extractelement <3 x i32> <i32 0, i32 1, i32 2>, i64 %index
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8 define amdgpu_kernel void @vector_alloca_not_atomic(i32 addrspace(1)* %out, i64 %index) {
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9 entry:
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10 %alloca = alloca [3 x i32], addrspace(5)
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11 %a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
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12 %a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
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13 %a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
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14 store i32 0, i32 addrspace(5)* %a0
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15 store i32 1, i32 addrspace(5)* %a1
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16 store i32 2, i32 addrspace(5)* %a2
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17 %tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
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18 %data = load i32, i32 addrspace(5)* %tmp
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19 store i32 %data, i32 addrspace(1)* %out
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20 ret void
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21 }
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22
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23 ; OPT-LABEL: @vector_alloca_atomic_read(
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24 ;
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25 ; OPT: alloca [3 x i32]
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26 ; OPT: store i32 0, i32 addrspace(5)*
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27 ; OPT: store i32 1, i32 addrspace(5)*
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28 ; OPT: store i32 2, i32 addrspace(5)*
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29 ; OPT: load atomic i32, i32 addrspace(5)*
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30 define amdgpu_kernel void @vector_alloca_atomic_read(i32 addrspace(1)* %out, i64 %index) {
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31 entry:
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32 %alloca = alloca [3 x i32], addrspace(5)
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33 %a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
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34 %a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
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35 %a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
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36 store i32 0, i32 addrspace(5)* %a0
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37 store i32 1, i32 addrspace(5)* %a1
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38 store i32 2, i32 addrspace(5)* %a2
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39 %tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
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40 %data = load atomic i32, i32 addrspace(5)* %tmp acquire, align 4
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41 store i32 %data, i32 addrspace(1)* %out
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42 ret void
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43 }
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44
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45 ; OPT-LABEL: @vector_alloca_atomic_write(
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46 ;
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47 ; OPT: alloca [3 x i32]
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48 ; OPT: store atomic i32 0, i32 addrspace(5)
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49 ; OPT: store atomic i32 1, i32 addrspace(5)
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50 ; OPT: store atomic i32 2, i32 addrspace(5)
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51 ; OPT: load i32, i32 addrspace(5)*
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52 define amdgpu_kernel void @vector_alloca_atomic_write(i32 addrspace(1)* %out, i64 %index) {
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53 entry:
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54 %alloca = alloca [3 x i32], addrspace(5)
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55 %a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
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56 %a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
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57 %a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
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58 store atomic i32 0, i32 addrspace(5)* %a0 release, align 4
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59 store atomic i32 1, i32 addrspace(5)* %a1 release, align 4
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60 store atomic i32 2, i32 addrspace(5)* %a2 release, align 4
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61 %tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
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62 %data = load i32, i32 addrspace(5)* %tmp
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63 store i32 %data, i32 addrspace(1)* %out
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64 ret void
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65 }
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