annotate llvm/test/ExecutionEngine/test-interp-vec-cast.ll @ 206:f17a3b42b08b

Added tag before-12 for changeset b7591485f4cd
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 07 Jun 2021 21:25:57 +0900
parents 1d019706d866
children 2e18cbf3894f
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1 ; RUN: %lli -force-interpreter=true %s > /dev/null
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2
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3 define i32 @main() {
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4 zext <2 x i1> <i1 true,i1 true> to <2 x i8>
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5 zext <3 x i1> <i1 true,i1 true,i1 true> to <3 x i8>
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6 zext <2 x i1> <i1 true,i1 true> to <2 x i16>
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7 zext <3 x i1> <i1 true,i1 true,i1 true> to <3 x i16>
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8 zext <2 x i1> <i1 true,i1 true> to <2 x i32>
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9 zext <3 x i1> <i1 true,i1 true,i1 true> to <3 x i32>
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10 zext <2 x i1> <i1 true,i1 true> to <2 x i64>
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11 zext <3 x i1> <i1 true,i1 true,i1 true> to <3 x i64>
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12 zext <3 x i8> <i8 4, i8 4, i8 4> to <3 x i16>
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13 zext <2 x i8> <i8 -4, i8 -4> to <2 x i16>
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14 zext <3 x i8> <i8 4, i8 4, i8 4> to <3 x i32>
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15 zext <2 x i8> <i8 -4, i8 -4> to <2 x i32>
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16 zext <3 x i8> <i8 4, i8 4, i8 4> to <3 x i64>
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17 zext <2 x i8> <i8 -4, i8 -4> to <2 x i64>
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18 zext <3 x i16> <i16 4, i16 4, i16 4> to <3 x i32>
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19 zext <2 x i16> <i16 -4, i16 -4> to <2 x i32>
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20 zext <3 x i16> <i16 4, i16 4, i16 4> to <3 x i64>
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21 zext <2 x i16> <i16 -4, i16 -4> to <2 x i64>
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22 zext <3 x i32> <i32 4, i32 4, i32 4> to <3 x i64>
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23 zext <2 x i32> <i32 -4, i32 -4> to <2 x i64>
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24
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25
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26 sext <2 x i1> <i1 true,i1 true> to <2 x i8>
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27 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i8>
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28 sext <2 x i1> <i1 true,i1 true> to <2 x i16>
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29 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i16>
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30 sext <2 x i1> <i1 true,i1 true> to <2 x i32>
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31 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i32>
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32 sext <2 x i1> <i1 true,i1 true> to <2 x i64>
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33 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i64>
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34 sext <3 x i8> <i8 -4, i8 0, i8 4> to <3 x i16>
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35 sext <2 x i8> <i8 -4, i8 4> to <2 x i16>
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36 sext <3 x i8> <i8 -4, i8 0, i8 4> to <3 x i32>
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37 sext <2 x i8> <i8 -4, i8 4> to <2 x i32>
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38 sext <3 x i8> <i8 -4, i8 0, i8 4> to <3 x i64>
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39 sext <2 x i8> <i8 -4, i8 4> to <2 x i64>
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40 sext <3 x i16> <i16 -4, i16 0, i16 4> to <3 x i32>
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41 sext <2 x i16> <i16 -4, i16 4> to <2 x i32>
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42 sext <3 x i16> <i16 -4, i16 0, i16 4> to <3 x i64>
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43 sext <2 x i16> <i16 -4, i16 4> to <2 x i64>
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44 sext <3 x i32> <i32 -4, i32 0, i32 4> to <3 x i64>
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45 sext <2 x i32> <i32 -4, i32 4> to <2 x i64>
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46
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47
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48 uitofp <3 x i1> <i1 true,i1 false,i1 true> to <3 x float>
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49 uitofp <2 x i1> <i1 true,i1 true> to <2 x double>
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50 uitofp <3 x i8> <i8 -4,i8 0,i8 4> to <3 x float>
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51 uitofp <2 x i8> <i8 -4,i8 4> to <2 x double>
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52 uitofp <3 x i16> <i16 -4,i16 0,i16 4> to <3 x float>
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53 uitofp <2 x i16> <i16 -4,i16 4> to <2 x double>
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54 uitofp <3 x i32> <i32 -4,i32 0,i32 4> to <3 x float>
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55 uitofp <2 x i32> <i32 -4,i32 4> to <2 x double>
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56 uitofp <3 x i64> <i64 -4,i64 0,i64 4> to <3 x float>
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57 uitofp <2 x i64> <i64 -4,i64 4> to <2 x double>
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58
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59
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60 sitofp <3 x i1> <i1 true,i1 false,i1 true> to <3 x float>
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61 sitofp <2 x i1> <i1 true,i1 true> to <2 x double>
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62 sitofp <3 x i8> <i8 -4,i8 0,i8 4> to <3 x float>
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63 sitofp <2 x i8> <i8 -4,i8 4> to <2 x double>
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64 sitofp <3 x i16> <i16 -4,i16 0,i16 4> to <3 x float>
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65 sitofp <2 x i16> <i16 -4,i16 4> to <2 x double>
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66 sitofp <3 x i32> <i32 -4,i32 0,i32 4> to <3 x float>
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67 sitofp <2 x i32> <i32 -4,i32 4> to <2 x double>
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68 sitofp <3 x i64> <i64 -4,i64 0,i64 4> to <3 x float>
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69 sitofp <2 x i64> <i64 -4,i64 4> to <2 x double>
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70
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71 trunc <2 x i16> <i16 -6, i16 6> to <2 x i8>
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72 trunc <3 x i16> <i16 -6, i16 6, i16 0> to <3 x i8>
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73 trunc <2 x i32> <i32 -6, i32 6> to <2 x i8>
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74 trunc <3 x i32> <i32 -6, i32 6, i32 0> to <3 x i8>
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75 trunc <2 x i32> <i32 -6, i32 6> to <2 x i16>
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76 trunc <3 x i32> <i32 -6, i32 6, i32 0> to <3 x i16>
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77 trunc <2 x i64> <i64 -6, i64 6> to <2 x i8>
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78 trunc <3 x i64> <i64 -6, i64 6, i64 0> to <3 x i8>
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79 trunc <2 x i64> <i64 -6, i64 6> to <2 x i16>
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80 trunc <3 x i64> <i64 -6, i64 6, i64 0> to <3 x i16>
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81 trunc <2 x i64> <i64 -6, i64 6> to <2 x i32>
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82 trunc <3 x i64> <i64 -6, i64 6, i64 0> to <3 x i32>
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83
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84
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85 fpext <2 x float> < float 0.000000e+00, float 1.0> to <2 x double>
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86 fpext <3 x float> < float 0.000000e+00, float -1.0, float 1.0> to <3 x double>
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87
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88 fptosi <2 x double> < double 0.000000e+00, double 1.0> to <2 x i8>
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89 fptosi <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i8>
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90 fptosi <2 x double> < double 0.000000e+00, double 1.0> to <2 x i16>
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91 fptosi <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i16>
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92 fptosi <2 x double> < double 0.000000e+00, double 1.0> to <2 x i32>
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93 fptosi <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i32>
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94 fptosi <2 x double> < double 0.000000e+00, double 1.0> to <2 x i64>
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95 fptosi <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i64>
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96
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97 fptoui <2 x double> < double 0.000000e+00, double 1.0> to <2 x i8>
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98 fptoui <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i8>
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99 fptoui <2 x double> < double 0.000000e+00, double 1.0> to <2 x i16>
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100 fptoui <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i16>
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101 fptoui <2 x double> < double 0.000000e+00, double 1.0> to <2 x i32>
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102 fptoui <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i32>
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103 fptoui <2 x double> < double 0.000000e+00, double 1.0> to <2 x i64>
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104 fptoui <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i64>
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105
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106 fptrunc <2 x double> < double 0.000000e+00, double 1.0> to <2 x float>
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107 fptrunc <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x float>
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108
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109 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to <4 x i16>
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110 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to <2 x i32>
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111 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to i64
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112 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to <2 x float>
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113 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to double
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114
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115 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to <8 x i8>
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116 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to <2 x i32>
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117 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to i64
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118 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to <2 x float>
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119 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to double
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120
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121 bitcast <2 x i32> <i32 1, i32 -1> to <8 x i8>
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122 bitcast <2 x i32> <i32 1, i32 -1> to <4 x i16>
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123 bitcast <2 x i32> <i32 1, i32 -1> to i64
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124 bitcast <2 x i32> <i32 1, i32 -1> to <2 x float>
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125 bitcast <2 x i32> <i32 1, i32 -1> to double
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126
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127 bitcast i64 1 to <8 x i8>
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128 bitcast i64 1 to <4 x i16>
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129 bitcast i64 1 to <2 x i32>
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130 bitcast i64 1 to <2 x float>
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131 bitcast i64 1 to double
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132
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133 bitcast <2 x float> <float 1.0, float -1.0> to <8 x i8>
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134 bitcast <2 x float> <float 1.0, float -1.0> to <4 x i16>
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135 bitcast <2 x float> <float 1.0, float -1.0> to i64
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136 bitcast <2 x float> <float 1.0, float -1.0> to <2 x i32>
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137 bitcast <2 x float> <float 1.0, float -1.0> to double
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138
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139 bitcast double 1.0 to <8 x i8>
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140 bitcast double 1.0 to <4 x i16>
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141 bitcast double 1.0 to <2 x i32>
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142 bitcast double 1.0 to <2 x float>
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143 bitcast double 1.0 to i64
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144
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145 ret i32 0
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146 }