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annotate lib/Target/MSP430/MSP430ISelDAGToDAG.cpp @ 131:f476a9ba4795

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http://llvm.org/svn/llvm-project/compiler-rt/trunk compiler-rt
author mir3636
date Fri, 16 Feb 2018 21:02:11 +0900
parents 803732b1fca8
children 3a76565eade5
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1 //===-- MSP430ISelDAGToDAG.cpp - A dag to dag inst selector for MSP430 ----===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file defines an instruction selector for the MSP430 target.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #include "MSP430.h"
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15 #include "MSP430TargetMachine.h"
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16 #include "llvm/CodeGen/MachineFrameInfo.h"
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17 #include "llvm/CodeGen/MachineFunction.h"
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18 #include "llvm/CodeGen/MachineInstrBuilder.h"
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19 #include "llvm/CodeGen/MachineRegisterInfo.h"
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20 #include "llvm/CodeGen/SelectionDAG.h"
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21 #include "llvm/CodeGen/SelectionDAGISel.h"
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22 #include "llvm/IR/CallingConv.h"
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23 #include "llvm/IR/Constants.h"
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24 #include "llvm/IR/DerivedTypes.h"
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25 #include "llvm/IR/Function.h"
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26 #include "llvm/IR/Intrinsics.h"
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27 #include "llvm/Support/Debug.h"
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28 #include "llvm/Support/ErrorHandling.h"
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29 #include "llvm/Support/raw_ostream.h"
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30 #include "llvm/Target/TargetLowering.h"
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31 using namespace llvm;
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32
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33 #define DEBUG_TYPE "msp430-isel"
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34
0
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35 namespace {
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36 struct MSP430ISelAddressMode {
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37 enum {
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38 RegBase,
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39 FrameIndexBase
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40 } BaseType;
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41
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42 struct { // This is really a union, discriminated by BaseType!
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43 SDValue Reg;
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44 int FrameIndex;
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45 } Base;
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46
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47 int16_t Disp;
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48 const GlobalValue *GV;
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49 const Constant *CP;
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50 const BlockAddress *BlockAddr;
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51 const char *ES;
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52 int JT;
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53 unsigned Align; // CP alignment.
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54
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55 MSP430ISelAddressMode()
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56 : BaseType(RegBase), Disp(0), GV(nullptr), CP(nullptr),
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57 BlockAddr(nullptr), ES(nullptr), JT(-1), Align(0) {
0
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58 }
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59
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60 bool hasSymbolicDisplacement() const {
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61 return GV != nullptr || CP != nullptr || ES != nullptr || JT != -1;
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62 }
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63
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64 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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65 LLVM_DUMP_METHOD void dump() {
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66 errs() << "MSP430ISelAddressMode " << this << '\n';
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67 if (BaseType == RegBase && Base.Reg.getNode() != nullptr) {
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68 errs() << "Base.Reg ";
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69 Base.Reg.getNode()->dump();
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70 } else if (BaseType == FrameIndexBase) {
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71 errs() << " Base.FrameIndex " << Base.FrameIndex << '\n';
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72 }
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73 errs() << " Disp " << Disp << '\n';
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74 if (GV) {
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75 errs() << "GV ";
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76 GV->dump();
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77 } else if (CP) {
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78 errs() << " CP ";
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79 CP->dump();
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80 errs() << " Align" << Align << '\n';
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81 } else if (ES) {
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82 errs() << "ES ";
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83 errs() << ES << '\n';
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84 } else if (JT != -1)
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85 errs() << " JT" << JT << " Align" << Align << '\n';
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86 }
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87 #endif
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88 };
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89 }
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90
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91 /// MSP430DAGToDAGISel - MSP430 specific code to select MSP430 machine
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92 /// instructions for SelectionDAG operations.
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93 ///
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94 namespace {
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95 class MSP430DAGToDAGISel : public SelectionDAGISel {
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96 public:
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97 MSP430DAGToDAGISel(MSP430TargetMachine &TM, CodeGenOpt::Level OptLevel)
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98 : SelectionDAGISel(TM, OptLevel) {}
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99
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100 StringRef getPassName() const override {
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101 return "MSP430 DAG->DAG Pattern Instruction Selection";
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102 }
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103
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104 bool MatchAddress(SDValue N, MSP430ISelAddressMode &AM);
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105 bool MatchWrapper(SDValue N, MSP430ISelAddressMode &AM);
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106 bool MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM);
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107
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108 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
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109 std::vector<SDValue> &OutOps) override;
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110
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111 // Include the pieces autogenerated from the target description.
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112 #include "MSP430GenDAGISel.inc"
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113
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114 private:
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115 void Select(SDNode *N) override;
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116 bool tryIndexedLoad(SDNode *Op);
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117 bool tryIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, unsigned Opc8,
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118 unsigned Opc16);
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119
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120 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
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121 };
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122 } // end anonymous namespace
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123
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124 /// createMSP430ISelDag - This pass converts a legalized DAG into a
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125 /// MSP430-specific DAG, ready for instruction scheduling.
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126 ///
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127 FunctionPass *llvm::createMSP430ISelDag(MSP430TargetMachine &TM,
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128 CodeGenOpt::Level OptLevel) {
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129 return new MSP430DAGToDAGISel(TM, OptLevel);
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130 }
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131
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parents:
diff changeset
132
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 /// MatchWrapper - Try to match MSP430ISD::Wrapper node into an addressing mode.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134 /// These wrap things that will resolve down into a symbol reference. If no
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 /// match is possible, this returns true, otherwise it returns false.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 bool MSP430DAGToDAGISel::MatchWrapper(SDValue N, MSP430ISelAddressMode &AM) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 // If the addressing mode already has a symbol as the displacement, we can
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 // never match another symbol.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 if (AM.hasSymbolicDisplacement())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 return true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 SDValue N0 = N.getOperand(0);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 AM.GV = G->getGlobal();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146 AM.Disp += G->getOffset();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147 //AM.SymbolFlags = G->getTargetFlags();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149 AM.CP = CP->getConstVal();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 AM.Align = CP->getAlignment();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 AM.Disp += CP->getOffset();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152 //AM.SymbolFlags = CP->getTargetFlags();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 AM.ES = S->getSymbol();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 //AM.SymbolFlags = S->getTargetFlags();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 AM.JT = J->getIndex();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
158 //AM.SymbolFlags = J->getTargetFlags();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 } else {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 //AM.SymbolFlags = cast<BlockAddressSDNode>(N0)->getTargetFlags();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 /// MatchAddressBase - Helper for MatchAddress. Add the specified node to the
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 /// specified addressing mode without any further recursion.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 bool MSP430DAGToDAGISel::MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 // Is the base register already occupied?
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 if (AM.BaseType != MSP430ISelAddressMode::RegBase || AM.Base.Reg.getNode()) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 // If so, we cannot select it.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 return true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 // Default, generate it as a register.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176 AM.BaseType = MSP430ISelAddressMode::RegBase;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 AM.Base.Reg = N;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
178 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
179 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 bool MSP430DAGToDAGISel::MatchAddress(SDValue N, MSP430ISelAddressMode &AM) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 DEBUG(errs() << "MatchAddress: "; AM.dump());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184 switch (N.getOpcode()) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 default: break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
186 case ISD::Constant: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
187 uint64_t Val = cast<ConstantSDNode>(N)->getSExtValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 AM.Disp += Val;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
189 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192 case MSP430ISD::Wrapper:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 if (!MatchWrapper(N, AM))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 case ISD::FrameIndex:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198 if (AM.BaseType == MSP430ISelAddressMode::RegBase
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
199 && AM.Base.Reg.getNode() == nullptr) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
200 AM.BaseType = MSP430ISelAddressMode::FrameIndexBase;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 AM.Base.FrameIndex = cast<FrameIndexSDNode>(N)->getIndex();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
204 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
205
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 case ISD::ADD: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 MSP430ISelAddressMode Backup = AM;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
208 if (!MatchAddress(N.getNode()->getOperand(0), AM) &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 !MatchAddress(N.getNode()->getOperand(1), AM))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211 AM = Backup;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
212 if (!MatchAddress(N.getNode()->getOperand(1), AM) &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
213 !MatchAddress(N.getNode()->getOperand(0), AM))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
214 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
215 AM = Backup;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
218 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 case ISD::OR:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
221 // Handle "X | C" as "X + C" iff X is known to have C bits clear.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
222 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
223 MSP430ISelAddressMode Backup = AM;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
224 uint64_t Offset = CN->getSExtValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
225 // Start with the LHS as an addr mode.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
226 if (!MatchAddress(N.getOperand(0), AM) &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
227 // Address could not have picked a GV address for the displacement.
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
228 AM.GV == nullptr &&
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
229 // Check to see if the LHS & C is zero.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
230 CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getAPIntValue())) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231 AM.Disp += Offset;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234 AM = Backup;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 return MatchAddressBase(N, AM);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 /// SelectAddr - returns true if it is able pattern match an addressing mode.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 /// It returns the operands which make up the maximal addressing mode it can
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 /// match by reference.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 bool MSP430DAGToDAGISel::SelectAddr(SDValue N,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 SDValue &Base, SDValue &Disp) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 MSP430ISelAddressMode AM;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249 if (MatchAddress(N, AM))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 EVT VT = N.getValueType();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 if (AM.BaseType == MSP430ISelAddressMode::RegBase) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254 if (!AM.Base.Reg.getNode())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 AM.Base.Reg = CurDAG->getRegister(0, VT);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
258 Base = (AM.BaseType == MSP430ISelAddressMode::FrameIndexBase)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
259 ? CurDAG->getTargetFrameIndex(
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
260 AM.Base.FrameIndex,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
261 getTargetLowering()->getPointerTy(CurDAG->getDataLayout()))
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
262 : AM.Base.Reg;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
263
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
264 if (AM.GV)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
265 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N),
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
266 MVT::i16, AM.Disp,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
267 0/*AM.SymbolFlags*/);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
268 else if (AM.CP)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
269 Disp = CurDAG->getTargetConstantPool(AM.CP, MVT::i16,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
270 AM.Align, AM.Disp, 0/*AM.SymbolFlags*/);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
271 else if (AM.ES)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
272 Disp = CurDAG->getTargetExternalSymbol(AM.ES, MVT::i16, 0/*AM.SymbolFlags*/);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
273 else if (AM.JT != -1)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
274 Disp = CurDAG->getTargetJumpTable(AM.JT, MVT::i16, 0/*AM.SymbolFlags*/);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
275 else if (AM.BlockAddr)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
276 Disp = CurDAG->getTargetBlockAddress(AM.BlockAddr, MVT::i32, 0,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
277 0/*AM.SymbolFlags*/);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
278 else
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
279 Disp = CurDAG->getTargetConstant(AM.Disp, SDLoc(N), MVT::i16);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
280
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
281 return true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
282 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
283
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
284 bool MSP430DAGToDAGISel::
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
285 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
286 std::vector<SDValue> &OutOps) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
287 SDValue Op0, Op1;
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
288 switch (ConstraintID) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
289 default: return true;
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
290 case InlineAsm::Constraint_m: // memory
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
291 if (!SelectAddr(Op, Op0, Op1))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
292 return true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
293 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
294 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
295
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
296 OutOps.push_back(Op0);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
297 OutOps.push_back(Op1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
298 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
299 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
300
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
301 static bool isValidIndexedLoad(const LoadSDNode *LD) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
302 ISD::MemIndexedMode AM = LD->getAddressingMode();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
303 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
304 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
305
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
306 EVT VT = LD->getMemoryVT();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
307
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
308 switch (VT.getSimpleVT().SimpleTy) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
309 case MVT::i8:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
310 // Sanity check
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
311 if (cast<ConstantSDNode>(LD->getOffset())->getZExtValue() != 1)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
312 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
313
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
314 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
315 case MVT::i16:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
316 // Sanity check
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
317 if (cast<ConstantSDNode>(LD->getOffset())->getZExtValue() != 2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
318 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
319
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
320 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
321 default:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
322 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
323 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
324
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
325 return true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
326 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
327
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
328 bool MSP430DAGToDAGISel::tryIndexedLoad(SDNode *N) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
329 LoadSDNode *LD = cast<LoadSDNode>(N);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
330 if (!isValidIndexedLoad(LD))
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
331 return false;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
332
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
333 MVT VT = LD->getMemoryVT().getSimpleVT();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
334
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
335 unsigned Opcode = 0;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
336 switch (VT.SimpleTy) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
337 case MVT::i8:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
338 Opcode = MSP430::MOV8rm_POST;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
339 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
340 case MVT::i16:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
341 Opcode = MSP430::MOV16rm_POST;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
342 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
343 default:
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
344 return false;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
345 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
346
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
347 ReplaceNode(N,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
348 CurDAG->getMachineNode(Opcode, SDLoc(N), VT, MVT::i16, MVT::Other,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
349 LD->getBasePtr(), LD->getChain()));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
350 return true;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
351 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
352
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
353 bool MSP430DAGToDAGISel::tryIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2,
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
354 unsigned Opc8, unsigned Opc16) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
355 if (N1.getOpcode() == ISD::LOAD &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
356 N1.hasOneUse() &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
357 IsLegalToFold(N1, Op, Op, OptLevel)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
358 LoadSDNode *LD = cast<LoadSDNode>(N1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
359 if (!isValidIndexedLoad(LD))
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
360 return false;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
361
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
362 MVT VT = LD->getMemoryVT().getSimpleVT();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
363 unsigned Opc = (VT == MVT::i16 ? Opc16 : Opc8);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
364 MachineSDNode::mmo_iterator MemRefs0 = MF->allocateMemRefsArray(1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
365 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
366 SDValue Ops0[] = { N2, LD->getBasePtr(), LD->getChain() };
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
367 SDNode *ResNode =
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
368 CurDAG->SelectNodeTo(Op, Opc, VT, MVT::i16, MVT::Other, Ops0);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
369 cast<MachineSDNode>(ResNode)->setMemRefs(MemRefs0, MemRefs0 + 1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
370 // Transfer chain.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
371 ReplaceUses(SDValue(N1.getNode(), 2), SDValue(ResNode, 2));
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
372 // Transfer writeback.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
373 ReplaceUses(SDValue(N1.getNode(), 1), SDValue(ResNode, 1));
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
374 return true;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
375 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
376
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
377 return false;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
378 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
379
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
380
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
381 void MSP430DAGToDAGISel::Select(SDNode *Node) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
382 SDLoc dl(Node);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
383
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
384 // Dump information about the Node being selected
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
385 DEBUG(errs() << "Selecting: ");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
386 DEBUG(Node->dump(CurDAG));
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
387 DEBUG(errs() << "\n");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
388
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
389 // If we have a custom node, we already have selected!
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
390 if (Node->isMachineOpcode()) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
391 DEBUG(errs() << "== ";
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
392 Node->dump(CurDAG);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
393 errs() << "\n");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
394 Node->setNodeId(-1);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
395 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
396 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
397
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
398 // Few custom selection stuff.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
399 switch (Node->getOpcode()) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
400 default: break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
401 case ISD::FrameIndex: {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
402 assert(Node->getValueType(0) == MVT::i16);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
403 int FI = cast<FrameIndexSDNode>(Node)->getIndex();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
404 SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i16);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
405 if (Node->hasOneUse()) {
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
406 CurDAG->SelectNodeTo(Node, MSP430::ADDframe, MVT::i16, TFI,
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
407 CurDAG->getTargetConstant(0, dl, MVT::i16));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
408 return;
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
409 }
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
410 ReplaceNode(Node, CurDAG->getMachineNode(
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
411 MSP430::ADDframe, dl, MVT::i16, TFI,
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
412 CurDAG->getTargetConstant(0, dl, MVT::i16)));
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
413 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
414 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
415 case ISD::LOAD:
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
416 if (tryIndexedLoad(Node))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
417 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
418 // Other cases are autogenerated.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
419 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
420 case ISD::ADD:
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
421 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
422 MSP430::ADD8rm_POST, MSP430::ADD16rm_POST))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
423 return;
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
424 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
425 MSP430::ADD8rm_POST, MSP430::ADD16rm_POST))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
426 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
427
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
428 // Other cases are autogenerated.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
429 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
430 case ISD::SUB:
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
431 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
432 MSP430::SUB8rm_POST, MSP430::SUB16rm_POST))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
433 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
434
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
435 // Other cases are autogenerated.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
436 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 case ISD::AND:
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
438 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
439 MSP430::AND8rm_POST, MSP430::AND16rm_POST))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
440 return;
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
441 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
442 MSP430::AND8rm_POST, MSP430::AND16rm_POST))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
443 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
444
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
445 // Other cases are autogenerated.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
446 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
447 case ISD::OR:
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
448 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
449 MSP430::OR8rm_POST, MSP430::OR16rm_POST))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
450 return;
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
451 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
452 MSP430::OR8rm_POST, MSP430::OR16rm_POST))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
453 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
454
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
455 // Other cases are autogenerated.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
456 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
457 case ISD::XOR:
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
458 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
459 MSP430::XOR8rm_POST, MSP430::XOR16rm_POST))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
460 return;
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
461 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
462 MSP430::XOR8rm_POST, MSP430::XOR16rm_POST))
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
463 return;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
464
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
465 // Other cases are autogenerated.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
466 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
467 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
468
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
469 // Select the default instruction
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 95
diff changeset
470 SelectCode(Node);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
471 }