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1 ============================
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2 AMDGPU Instructions Notation
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3 ============================
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4
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5 .. contents::
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6 :local:
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7
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8 .. _amdgpu_syn_instruction_notation:
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9
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10 Introduction
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11 ============
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12
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13 This is an overview of notation used to describe the syntax of AMDGPU assembler instructions.
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14
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15 This notation mimics the :ref:`syntax of assembler instructions<amdgpu_syn_instructions>`
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16 except that instead of real operands and modifiers it provides references to their description.
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17
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18 Instructions
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19 ============
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20
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21 Notation
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22 ~~~~~~~~
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23
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24 This is the notation used to describe AMDGPU instructions:
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25
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26 ``<``\ :ref:`opcode description<amdgpu_syn_opcode_notation>`\ ``> <``\ :ref:`operands description<amdgpu_syn_instruction_operands_notation>`\ ``> <``\ :ref:`modifiers description<amdgpu_syn_instruction_modifiers_notation>`\ ``>``
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27
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28 .. _amdgpu_syn_opcode_notation:
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29
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30 Opcode
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31 ======
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32
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33 Notation
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34 ~~~~~~~~
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35
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36 TBD
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37
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38 .. _amdgpu_syn_instruction_operands_notation:
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39
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40 Operands
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41 ========
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42
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43 An instruction may have zero or more *operands*. They are comma-separated in the description:
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44
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45 ``<``\ :ref:`description of operand 0<amdgpu_syn_instruction_operand_notation>`\ ``>, <``\ :ref:`description of operand 1<amdgpu_syn_instruction_operand_notation>`\ ``>, ...``
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46
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47 The order of *operands* is fixed. *Operands* cannot be omitted
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48 except for special cases described below.
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49
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50 .. _amdgpu_syn_instruction_operand_notation:
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51
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52 Notation
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53 ~~~~~~~~
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54
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55 An operand is described using the following notation:
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56
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57 *<name><tag0><tag1>...*
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58
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59 Where:
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60
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61 * *name* is a link to a description of the operand.
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62 * *tags* are optional. They are used to indicate special operand properties:
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63
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64 .. _amdgpu_syn_instruction_operand_tags:
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65
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66 ============== =================================================================================
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67 Operand tag Meaning
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68 ============== =================================================================================
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69 :opt An optional operand.
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70 :m An operand which may be used with
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71 :ref:`VOP3 operand modifiers<amdgpu_synid_vop3_operand_modifiers>` or
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72 :ref:`SDWA operand modifiers<amdgpu_synid_sdwa_operand_modifiers>`.
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73 :dst An input operand which may also serve as a destination
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74 if :ref:`glc<amdgpu_synid_glc>` modifier is specified.
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75 :fx This is an *f32* or *f16* operand depending on
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76 :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` modifier.
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77 :<type> Operand *type* differs from *type*
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78 :ref:`implied by the opcode name<amdgpu_syn_instruction_type>`.
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79 This tag specifies actual operand *type*.
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80 ============== =================================================================================
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81
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82 Examples:
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83
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84 .. parsed-literal::
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85
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86 src1:m // src1 operand may be used with operand modifiers
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87 vdata:dst // vdata operand may be used as both source and destination
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88 vdst:u32 // vdst operand has u32 type
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89
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90 .. _amdgpu_syn_instruction_modifiers_notation:
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91
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92 Modifiers
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93 =========
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94
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95 An instruction may have zero or more optional *modifiers*. They are space-separated in the description:
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96
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97 ``<``\ :ref:`description of modifier 0<amdgpu_syn_instruction_modifier_notation>`\ ``> <``\ :ref:`description of modifier 1<amdgpu_syn_instruction_modifier_notation>`\ ``> ...``
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98
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99 The order of *modifiers* is fixed.
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100
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101 .. _amdgpu_syn_instruction_modifier_notation:
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102
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103 Notation
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104 ~~~~~~~~
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105
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106 A *modifier* is described using the following notation:
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107
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108 *<name>*
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109
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110 Where *name* is a link to a description of the *modifier*.
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