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150
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1 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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2 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s| FileCheck -check-prefix=GCN -check-prefix=SI %s
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3
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4 ;;;==========================================================================;;;
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5 ;; 16-bit integer comparisons
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6 ;;;==========================================================================;;;
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7
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8 ; GCN-LABEL: {{^}}i16_eq:
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9 ; VI: v_cmp_eq_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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10 ; SI: v_cmp_eq_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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11 define amdgpu_kernel void @i16_eq(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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12 entry:
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13 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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14 %tid.ext = sext i32 %tid to i64
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252
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15 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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16 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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17 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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18 %a = load i16, ptr addrspace(1) %a.gep
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19 %b = load i16, ptr addrspace(1) %b.gep
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150
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20 %tmp0 = icmp eq i16 %a, %b
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21 %tmp1 = sext i1 %tmp0 to i32
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252
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22 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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23 ret void
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24 }
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25
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26 ; GCN-LABEL: {{^}}i16_ne:
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27 ; VI: v_cmp_ne_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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28 ; SI: v_cmp_ne_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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29 define amdgpu_kernel void @i16_ne(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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30 entry:
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31 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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32 %tid.ext = sext i32 %tid to i64
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252
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33 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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34 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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35 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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36 %a = load i16, ptr addrspace(1) %a.gep
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37 %b = load i16, ptr addrspace(1) %b.gep
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150
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38 %tmp0 = icmp ne i16 %a, %b
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39 %tmp1 = sext i1 %tmp0 to i32
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252
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40 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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41 ret void
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42 }
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43
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44 ; GCN-LABEL: {{^}}i16_ugt:
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45 ; VI: v_cmp_gt_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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46 ; SI: v_cmp_gt_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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47 define amdgpu_kernel void @i16_ugt(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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48 entry:
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49 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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50 %tid.ext = sext i32 %tid to i64
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252
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51 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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52 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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53 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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54 %a = load i16, ptr addrspace(1) %a.gep
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55 %b = load i16, ptr addrspace(1) %b.gep
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150
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56 %tmp0 = icmp ugt i16 %a, %b
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57 %tmp1 = sext i1 %tmp0 to i32
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252
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58 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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59 ret void
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60 }
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61
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62 ; GCN-LABEL: {{^}}i16_uge:
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63 ; VI: v_cmp_ge_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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64 ; SI: v_cmp_ge_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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65 define amdgpu_kernel void @i16_uge(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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66 entry:
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67 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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68 %tid.ext = sext i32 %tid to i64
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252
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69 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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70 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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71 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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72 %a = load i16, ptr addrspace(1) %a.gep
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73 %b = load i16, ptr addrspace(1) %b.gep
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150
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74 %tmp0 = icmp uge i16 %a, %b
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75 %tmp1 = sext i1 %tmp0 to i32
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252
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76 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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77 ret void
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78 }
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79
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80 ; GCN-LABEL: {{^}}i16_ult:
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81 ; VI: v_cmp_lt_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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82 ; SI: v_cmp_lt_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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83 define amdgpu_kernel void @i16_ult(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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84 entry:
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85 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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86 %tid.ext = sext i32 %tid to i64
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252
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87 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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88 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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89 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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90 %a = load i16, ptr addrspace(1) %a.gep
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91 %b = load i16, ptr addrspace(1) %b.gep
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150
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92 %tmp0 = icmp ult i16 %a, %b
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93 %tmp1 = sext i1 %tmp0 to i32
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252
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94 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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95 ret void
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96 }
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97
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98 ; GCN-LABEL: {{^}}i16_ule:
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99 ; VI: v_cmp_le_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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100 ; SI: v_cmp_le_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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101 define amdgpu_kernel void @i16_ule(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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102 entry:
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103 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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104 %tid.ext = sext i32 %tid to i64
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252
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105 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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106 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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107 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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108 %a = load i16, ptr addrspace(1) %a.gep
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109 %b = load i16, ptr addrspace(1) %b.gep
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150
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110 %tmp0 = icmp ule i16 %a, %b
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111 %tmp1 = sext i1 %tmp0 to i32
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252
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112 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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113 ret void
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114
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115 }
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116
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117 ; GCN-LABEL: {{^}}i16_sgt:
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118 ; VI: v_cmp_gt_i16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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119 ; SI: v_cmp_gt_i32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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120 define amdgpu_kernel void @i16_sgt(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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121 entry:
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122 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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123 %tid.ext = sext i32 %tid to i64
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252
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124 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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125 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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126 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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127 %a = load i16, ptr addrspace(1) %a.gep
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128 %b = load i16, ptr addrspace(1) %b.gep
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150
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129 %tmp0 = icmp sgt i16 %a, %b
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130 %tmp1 = sext i1 %tmp0 to i32
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252
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131 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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132 ret void
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133 }
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134
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135 ; GCN-LABEL: {{^}}i16_sge:
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136 ; VI: v_cmp_ge_i16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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137 ; SI: v_cmp_ge_i32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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138 define amdgpu_kernel void @i16_sge(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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139 entry:
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140 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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141 %tid.ext = sext i32 %tid to i64
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252
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142 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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143 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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144 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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145 %a = load i16, ptr addrspace(1) %a.gep
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146 %b = load i16, ptr addrspace(1) %b.gep
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150
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147 %tmp0 = icmp sge i16 %a, %b
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148 %tmp1 = sext i1 %tmp0 to i32
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252
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149 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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150 ret void
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151 }
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152
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153 ; GCN-LABEL: {{^}}i16_slt:
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154 ; VI: v_cmp_lt_i16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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155 ; SI: v_cmp_lt_i32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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156 define amdgpu_kernel void @i16_slt(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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157 entry:
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158 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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159 %tid.ext = sext i32 %tid to i64
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252
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160 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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161 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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162 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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163 %a = load i16, ptr addrspace(1) %a.gep
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164 %b = load i16, ptr addrspace(1) %b.gep
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150
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165 %tmp0 = icmp slt i16 %a, %b
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166 %tmp1 = sext i1 %tmp0 to i32
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252
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167 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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168 ret void
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169 }
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170
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171 ; GCN-LABEL: {{^}}i16_sle:
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172 ; VI: v_cmp_le_i16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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173 ; SI: v_cmp_le_i32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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252
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174 define amdgpu_kernel void @i16_sle(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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175 entry:
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176 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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177 %tid.ext = sext i32 %tid to i64
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252
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178 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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179 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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180 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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181 %a = load i16, ptr addrspace(1) %a.gep
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182 %b = load i16, ptr addrspace(1) %b.gep
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150
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183 %tmp0 = icmp sle i16 %a, %b
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184 %tmp1 = sext i1 %tmp0 to i32
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252
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185 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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186 ret void
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187 }
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188
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189 ; These should be commuted to reduce code size
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190 ; GCN-LABEL: {{^}}i16_eq_v_s:
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191 ; VI: v_cmp_eq_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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192 ; SI: v_cmp_eq_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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252
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193 define amdgpu_kernel void @i16_eq_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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150
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194 entry:
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195 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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196 %tid.ext = sext i32 %tid to i64
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252
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197 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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198 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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199 %a = load i16, ptr addrspace(1) %a.gep
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150
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200 %tmp0 = icmp eq i16 %a, %b
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201 %tmp1 = sext i1 %tmp0 to i32
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252
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202 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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203 ret void
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204 }
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205
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206 ; GCN-LABEL: {{^}}i16_ne_v_s:
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207 ; VI: v_cmp_ne_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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208 ; SI: v_cmp_ne_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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252
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209 define amdgpu_kernel void @i16_ne_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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150
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210 entry:
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211 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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212 %tid.ext = sext i32 %tid to i64
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252
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213 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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214 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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215 %a = load i16, ptr addrspace(1) %a.gep
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150
|
216 %tmp0 = icmp ne i16 %a, %b
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217 %tmp1 = sext i1 %tmp0 to i32
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252
|
218 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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219 ret void
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220 }
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221
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222 ; GCN-LABEL: {{^}}i16_ugt_v_s:
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223 ; VI: v_cmp_lt_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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224 ; SI: v_cmp_lt_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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252
|
225 define amdgpu_kernel void @i16_ugt_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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150
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226 entry:
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227 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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228 %tid.ext = sext i32 %tid to i64
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252
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229 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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230 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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231 %a = load i16, ptr addrspace(1) %a.gep
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150
|
232 %tmp0 = icmp ugt i16 %a, %b
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233 %tmp1 = sext i1 %tmp0 to i32
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252
|
234 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
|
235 ret void
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236 }
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237
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238 ; GCN-LABEL: {{^}}i16_uge_v_s:
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239 ; VI: v_cmp_le_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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240 ; SI: v_cmp_le_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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252
|
241 define amdgpu_kernel void @i16_uge_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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150
|
242 entry:
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|
243 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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244 %tid.ext = sext i32 %tid to i64
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252
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245 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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246 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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247 %a = load i16, ptr addrspace(1) %a.gep
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150
|
248 %tmp0 = icmp uge i16 %a, %b
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249 %tmp1 = sext i1 %tmp0 to i32
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252
|
250 store i32 %tmp1, ptr addrspace(1) %out.gep
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|
150
|
251 ret void
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|
|
252 }
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253
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|
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254 ; GCN-LABEL: {{^}}i16_ult_v_s:
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255 ; VI: v_cmp_gt_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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256 ; SI: v_cmp_gt_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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252
|
257 define amdgpu_kernel void @i16_ult_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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|
150
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258 entry:
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259 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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260 %tid.ext = sext i32 %tid to i64
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252
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261 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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262 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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263 %a = load i16, ptr addrspace(1) %a.gep
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150
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264 %tmp0 = icmp ult i16 %a, %b
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265 %tmp1 = sext i1 %tmp0 to i32
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252
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266 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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267 ret void
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268 }
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269
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270 ; GCN-LABEL: {{^}}i16_ule_v_s:
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271 ; VI: v_cmp_ge_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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272 ; SI: v_cmp_ge_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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252
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273 define amdgpu_kernel void @i16_ule_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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150
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274 entry:
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275 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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276 %tid.ext = sext i32 %tid to i64
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252
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277 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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278 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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279 %a = load i16, ptr addrspace(1) %a.gep
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150
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280 %tmp0 = icmp ule i16 %a, %b
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281 %tmp1 = sext i1 %tmp0 to i32
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252
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282 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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283 ret void
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284 }
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285
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286 ; GCN-LABEL: {{^}}i16_sgt_v_s:
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287 ; VI: v_cmp_lt_i16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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288 ; SI: v_cmp_lt_i32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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252
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289 define amdgpu_kernel void @i16_sgt_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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150
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290 entry:
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291 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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292 %tid.ext = sext i32 %tid to i64
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252
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293 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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294 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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295 %a = load i16, ptr addrspace(1) %a.gep
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150
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296 %tmp0 = icmp sgt i16 %a, %b
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297 %tmp1 = sext i1 %tmp0 to i32
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252
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298 store i32 %tmp1, ptr addrspace(1) %out.gep
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150
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299 ret void
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300 }
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301
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302 ; GCN-LABEL: {{^}}i16_sge_v_s:
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303 ; VI: v_cmp_le_i16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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304 ; SI: v_cmp_le_i32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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252
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305 define amdgpu_kernel void @i16_sge_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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150
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306 entry:
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307 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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308 %tid.ext = sext i32 %tid to i64
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252
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309 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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310 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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311 %a = load i16, ptr addrspace(1) %a.gep
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|
150
|
312 %tmp0 = icmp sge i16 %a, %b
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313 %tmp1 = sext i1 %tmp0 to i32
|
|
252
|
314 store i32 %tmp1, ptr addrspace(1) %out.gep
|
|
150
|
315 ret void
|
|
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316 }
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317
|
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318 ; GCN-LABEL: {{^}}i16_slt_v_s:
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319 ; VI: v_cmp_gt_i16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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320 ; SI: v_cmp_gt_i32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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252
|
321 define amdgpu_kernel void @i16_slt_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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|
150
|
322 entry:
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323 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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324 %tid.ext = sext i32 %tid to i64
|
|
252
|
325 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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326 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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327 %a = load i16, ptr addrspace(1) %a.gep
|
|
150
|
328 %tmp0 = icmp slt i16 %a, %b
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|
329 %tmp1 = sext i1 %tmp0 to i32
|
|
252
|
330 store i32 %tmp1, ptr addrspace(1) %out.gep
|
|
150
|
331 ret void
|
|
|
332 }
|
|
|
333
|
|
|
334 ; GCN-LABEL: {{^}}i16_sle_v_s:
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|
|
335 ; VI: v_cmp_ge_i16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
|
|
|
336 ; SI: v_cmp_ge_i32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
|
|
252
|
337 define amdgpu_kernel void @i16_sle_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
|
|
150
|
338 entry:
|
|
|
339 %tid = call i32 @llvm.amdgcn.workitem.id.x()
|
|
|
340 %tid.ext = sext i32 %tid to i64
|
|
252
|
341 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
|
|
|
342 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
|
|
|
343 %a = load i16, ptr addrspace(1) %a.gep
|
|
150
|
344 %tmp0 = icmp sle i16 %a, %b
|
|
|
345 %tmp1 = sext i1 %tmp0 to i32
|
|
252
|
346 store i32 %tmp1, ptr addrspace(1) %out.gep
|
|
150
|
347 ret void
|
|
|
348 }
|
|
|
349
|
|
|
350 declare i32 @llvm.amdgcn.workitem.id.x() #1
|
|
|
351
|
|
|
352 attributes #0 = { nounwind }
|
|
|
353 attributes #1 = { nounwind readnone }
|
