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150
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1 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=SI %s
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2 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=SI %s
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3 ; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=VI %s
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4 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=VI %s
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5
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6 ; GCN-LABEL: {{^}}s_cvt_pk_i16_i32:
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236
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7 ; GCN-DAG: s_load_dwordx4 s[[[#LOAD:]]:{{[0-9]+}}], s[0:1], 0x{{9|24}}
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8 ; GCN: v_mov_b32_e32 [[VY:v[0-9]+]], s[[#LOAD + 3]]
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9 ; SI: v_cvt_pk_i16_i32_e32 v{{[0-9]+}}, s[[#LOAD + 2]], [[VY]]
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10 ; VI: v_cvt_pk_i16_i32 v{{[0-9]+}}, s[[#LOAD + 2]], [[VY]]
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252
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11 define amdgpu_kernel void @s_cvt_pk_i16_i32(ptr addrspace(1) %out, i32 %x, i32 %y) #0 {
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150
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12 %result = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 %x, i32 %y)
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13 %r = bitcast <2 x i16> %result to i32
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252
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14 store i32 %r, ptr addrspace(1) %out
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150
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15 ret void
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16 }
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17
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18 ; GCN-LABEL: {{^}}s_cvt_pk_i16_samereg_i32:
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19 ; GCN: s_load_dword [[X:s[0-9]+]]
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20 ; GCN: v_cvt_pk_i16_i32{{(_e64)*}} v{{[0-9]+}}, [[X]], [[X]]
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252
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21 define amdgpu_kernel void @s_cvt_pk_i16_samereg_i32(ptr addrspace(1) %out, i32 %x) #0 {
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150
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22 %result = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 %x, i32 %x)
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23 %r = bitcast <2 x i16> %result to i32
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252
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24 store i32 %r, ptr addrspace(1) %out
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150
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25 ret void
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26 }
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27
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28 ; GCN-LABEL: {{^}}v_cvt_pk_i16_i32:
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29 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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30 ; GCN: {{buffer|flat|global}}_load_dword [[B:v[0-9]+]]
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31 ; SI: v_cvt_pk_i16_i32_e32 v{{[0-9]+}}, [[A]], [[B]]
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32 ; VI: v_cvt_pk_i16_i32 v{{[0-9]+}}, [[A]], [[B]]
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252
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33 define amdgpu_kernel void @v_cvt_pk_i16_i32(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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150
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34 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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35 %tid.ext = sext i32 %tid to i64
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252
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36 %a.gep = getelementptr inbounds i32, ptr addrspace(1) %a.ptr, i64 %tid.ext
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37 %b.gep = getelementptr inbounds i32, ptr addrspace(1) %b.ptr, i64 %tid.ext
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38 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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39 %a = load volatile i32, ptr addrspace(1) %a.gep
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40 %b = load volatile i32, ptr addrspace(1) %b.gep
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150
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41 %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 %a, i32 %b)
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42 %r = bitcast <2 x i16> %cvt to i32
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252
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43 store i32 %r, ptr addrspace(1) %out.gep
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150
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44 ret void
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45 }
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46
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47 ; GCN-LABEL: {{^}}v_cvt_pk_i16_i32_reg_imm:
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48 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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49 ; GCN: v_cvt_pk_i16_i32{{(_e64)*}} v{{[0-9]+}}, [[A]], 1
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252
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50 define amdgpu_kernel void @v_cvt_pk_i16_i32_reg_imm(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr) #0 {
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150
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51 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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52 %tid.ext = sext i32 %tid to i64
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252
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53 %a.gep = getelementptr inbounds i32, ptr addrspace(1) %a.ptr, i64 %tid.ext
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54 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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55 %a = load volatile i32, ptr addrspace(1) %a.gep
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150
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56 %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 %a, i32 1)
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57 %r = bitcast <2 x i16> %cvt to i32
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252
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58 store i32 %r, ptr addrspace(1) %out.gep
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150
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59 ret void
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60 }
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61
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62 ; GCN-LABEL: {{^}}v_cvt_pk_i16_i32_imm_reg:
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63 ; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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64 ; SI: v_cvt_pk_i16_i32_e32 v{{[0-9]+}}, 1, [[A]]
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65 ; VI: v_cvt_pk_i16_i32 v{{[0-9]+}}, 1, [[A]]
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252
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66 define amdgpu_kernel void @v_cvt_pk_i16_i32_imm_reg(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr) #0 {
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150
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67 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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68 %tid.ext = sext i32 %tid to i64
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252
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69 %a.gep = getelementptr inbounds i32, ptr addrspace(1) %a.ptr, i64 %tid.ext
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70 %out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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71 %a = load volatile i32, ptr addrspace(1) %a.gep
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150
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72 %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 1, i32 %a)
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73 %r = bitcast <2 x i16> %cvt to i32
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252
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74 store i32 %r, ptr addrspace(1) %out.gep
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150
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75 ret void
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76 }
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77
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78 declare <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32, i32) #1
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79 declare i32 @llvm.amdgcn.workitem.id.x() #1
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80
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81
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82 attributes #0 = { nounwind }
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83 attributes #1 = { nounwind readnone }
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