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annotate llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll @ 266:00f31e85ec16 default tip

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Added tag current for changeset 31d058e83c98
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sat, 14 Oct 2023 10:13:55 +0900
parents 1f2b6ac9f198
children
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1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 236
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1 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 236
diff changeset
2 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 236
diff changeset
3 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 236
diff changeset
4 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 236
diff changeset
5 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 236
diff changeset
6 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 236
diff changeset
7 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 236
diff changeset
8 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
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9
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10 ; GCN-LABEL: {{^}}test_init_exec:
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11 ; GFX1032: s_mov_b32 exec_lo, 0x12345
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12 ; GFX1064: s_mov_b64 exec, 0x12345
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13 ; GCN: v_add_f32_e32 v0,
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14 define amdgpu_ps float @test_init_exec(float %a, float %b) {
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15 main_body:
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16 %s = fadd float %a, %b
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17 call void @llvm.amdgcn.init.exec(i64 74565)
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18 ret float %s
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19 }
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20
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21 ; GCN-LABEL: {{^}}test_init_exec_from_input:
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22 ; GCN: s_bfe_u32 s0, s3, 0x70008
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23 ; GFX1032: s_bfm_b32 exec_lo, s0, 0
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24 ; GFX1032: s_cmp_eq_u32 s0, 32
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25 ; GFX1032: s_cmov_b32 exec_lo, -1
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26 ; GFX1064: s_bfm_b64 exec, s0, 0
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27 ; GFX1064: s_cmp_eq_u32 s0, 64
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28 ; GFX1064: s_cmov_b64 exec, -1
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29 ; GCN: v_add_f32_e32 v0,
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30 define amdgpu_ps float @test_init_exec_from_input(i32 inreg, i32 inreg, i32 inreg, i32 inreg %count, float %a, float %b) {
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31 main_body:
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32 %s = fadd float %a, %b
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33 call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 8)
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34 ret float %s
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35 }
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36
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37 declare void @llvm.amdgcn.init.exec(i64)
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38 declare void @llvm.amdgcn.init.exec.from.input(i32, i32)