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252
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1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefixes=PREGFX10-UNPACKED %s
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3 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx810 -verify-machineinstrs < %s | FileCheck -check-prefixes=PREGFX10-PACKED %s
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4 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=PREGFX10-PACKED %s
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5 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-PACKED %s
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6 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -amdgpu-enable-vopd=0 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-PACKED %s
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150
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7
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8 define amdgpu_kernel void @tbuffer_store_d16_x(<4 x i32> %rsrc, half %data, i32 %vindex) {
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252
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9 ; PREGFX10-UNPACKED-LABEL: tbuffer_store_d16_x:
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10 ; PREGFX10-UNPACKED: ; %bb.0: ; %main_body
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11 ; PREGFX10-UNPACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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12 ; PREGFX10-UNPACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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13 ; PREGFX10-UNPACKED-NEXT: s_waitcnt lgkmcnt(0)
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14 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, s6
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15 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v1, s7
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16 ; PREGFX10-UNPACKED-NEXT: tbuffer_store_format_d16_x v0, v1, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen
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17 ; PREGFX10-UNPACKED-NEXT: s_endpgm
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18 ;
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19 ; PREGFX10-PACKED-LABEL: tbuffer_store_d16_x:
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20 ; PREGFX10-PACKED: ; %bb.0: ; %main_body
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21 ; PREGFX10-PACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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22 ; PREGFX10-PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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23 ; PREGFX10-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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24 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v0, s6
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25 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v1, s7
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26 ; PREGFX10-PACKED-NEXT: tbuffer_store_format_d16_x v0, v1, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen
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27 ; PREGFX10-PACKED-NEXT: s_endpgm
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28 ;
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29 ; GFX10-PACKED-LABEL: tbuffer_store_d16_x:
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30 ; GFX10-PACKED: ; %bb.0: ; %main_body
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31 ; GFX10-PACKED-NEXT: s_clause 0x1
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32 ; GFX10-PACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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33 ; GFX10-PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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34 ; GFX10-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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35 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, s6
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36 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v1, s7
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37 ; GFX10-PACKED-NEXT: tbuffer_store_format_d16_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_11_11_SSCALED] idxen
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38 ; GFX10-PACKED-NEXT: s_endpgm
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39 ;
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40 ; GFX11-PACKED-LABEL: tbuffer_store_d16_x:
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41 ; GFX11-PACKED: ; %bb.0: ; %main_body
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42 ; GFX11-PACKED-NEXT: s_clause 0x1
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43 ; GFX11-PACKED-NEXT: s_load_b64 s[4:5], s[0:1], 0x10
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44 ; GFX11-PACKED-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
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45 ; GFX11-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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46 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, s4
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47 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v1, s5
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48 ; GFX11-PACKED-NEXT: tbuffer_store_d16_format_x v0, v1, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
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49 ; GFX11-PACKED-NEXT: s_nop 0
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50 ; GFX11-PACKED-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
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51 ; GFX11-PACKED-NEXT: s_endpgm
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150
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52 main_body:
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53 call void @llvm.amdgcn.struct.tbuffer.store.f16(half %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 33, i32 0)
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54 ret void
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55 }
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56
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57 define amdgpu_kernel void @tbuffer_store_d16_xy(<4 x i32> %rsrc, <2 x half> %data, i32 %vindex) {
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252
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58 ; PREGFX10-UNPACKED-LABEL: tbuffer_store_d16_xy:
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59 ; PREGFX10-UNPACKED: ; %bb.0: ; %main_body
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60 ; PREGFX10-UNPACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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61 ; PREGFX10-UNPACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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62 ; PREGFX10-UNPACKED-NEXT: s_waitcnt lgkmcnt(0)
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63 ; PREGFX10-UNPACKED-NEXT: s_lshr_b32 s4, s6, 16
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64 ; PREGFX10-UNPACKED-NEXT: s_and_b32 s5, s6, 0xffff
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65 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, s5
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66 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v1, s4
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67 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v2, s7
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68 ; PREGFX10-UNPACKED-NEXT: tbuffer_store_format_d16_xy v[0:1], v2, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen
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69 ; PREGFX10-UNPACKED-NEXT: s_endpgm
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70 ;
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71 ; PREGFX10-PACKED-LABEL: tbuffer_store_d16_xy:
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72 ; PREGFX10-PACKED: ; %bb.0: ; %main_body
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73 ; PREGFX10-PACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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74 ; PREGFX10-PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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75 ; PREGFX10-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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76 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v0, s6
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77 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v1, s7
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78 ; PREGFX10-PACKED-NEXT: tbuffer_store_format_d16_xy v0, v1, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen
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79 ; PREGFX10-PACKED-NEXT: s_endpgm
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80 ;
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81 ; GFX10-PACKED-LABEL: tbuffer_store_d16_xy:
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82 ; GFX10-PACKED: ; %bb.0: ; %main_body
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83 ; GFX10-PACKED-NEXT: s_clause 0x1
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84 ; GFX10-PACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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85 ; GFX10-PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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86 ; GFX10-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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87 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, s6
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88 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v1, s7
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89 ; GFX10-PACKED-NEXT: tbuffer_store_format_d16_xy v0, v1, s[0:3], 0 format:[BUF_FMT_10_11_11_SSCALED] idxen
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90 ; GFX10-PACKED-NEXT: s_endpgm
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91 ;
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92 ; GFX11-PACKED-LABEL: tbuffer_store_d16_xy:
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93 ; GFX11-PACKED: ; %bb.0: ; %main_body
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94 ; GFX11-PACKED-NEXT: s_clause 0x1
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95 ; GFX11-PACKED-NEXT: s_load_b64 s[4:5], s[0:1], 0x10
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96 ; GFX11-PACKED-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
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97 ; GFX11-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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98 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, s4
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99 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v1, s5
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100 ; GFX11-PACKED-NEXT: tbuffer_store_d16_format_xy v0, v1, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
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101 ; GFX11-PACKED-NEXT: s_nop 0
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102 ; GFX11-PACKED-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
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103 ; GFX11-PACKED-NEXT: s_endpgm
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150
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104 main_body:
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105 call void @llvm.amdgcn.struct.tbuffer.store.v2f16(<2 x half> %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 33, i32 0)
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106 ret void
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107 }
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108
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221
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109 define amdgpu_kernel void @tbuffer_store_d16_xyz(<4 x i32> %rsrc, <4 x half> %data, i32 %vindex) {
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252
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110 ; PREGFX10-UNPACKED-LABEL: tbuffer_store_d16_xyz:
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111 ; PREGFX10-UNPACKED: ; %bb.0: ; %main_body
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112 ; PREGFX10-UNPACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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113 ; PREGFX10-UNPACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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114 ; PREGFX10-UNPACKED-NEXT: s_load_dword s4, s[4:5], 0x18
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115 ; PREGFX10-UNPACKED-NEXT: s_waitcnt lgkmcnt(0)
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116 ; PREGFX10-UNPACKED-NEXT: s_and_b32 s5, s7, 0xffff
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117 ; PREGFX10-UNPACKED-NEXT: s_lshr_b32 s7, s6, 16
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118 ; PREGFX10-UNPACKED-NEXT: s_and_b32 s6, s6, 0xffff
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119 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, s6
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120 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v1, s7
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121 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v2, s5
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122 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v3, s4
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123 ; PREGFX10-UNPACKED-NEXT: tbuffer_store_format_d16_xyz v[0:2], v3, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen
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124 ; PREGFX10-UNPACKED-NEXT: s_endpgm
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125 ;
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126 ; PREGFX10-PACKED-LABEL: tbuffer_store_d16_xyz:
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127 ; PREGFX10-PACKED: ; %bb.0: ; %main_body
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128 ; PREGFX10-PACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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129 ; PREGFX10-PACKED-NEXT: s_load_dword s8, s[4:5], 0x18
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130 ; PREGFX10-PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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131 ; PREGFX10-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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132 ; PREGFX10-PACKED-NEXT: s_and_b32 s4, s7, 0xffff
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133 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v0, s6
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134 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v1, s4
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135 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v2, s8
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136 ; PREGFX10-PACKED-NEXT: tbuffer_store_format_d16_xyz v[0:1], v2, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen
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137 ; PREGFX10-PACKED-NEXT: s_endpgm
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138 ;
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139 ; GFX10-PACKED-LABEL: tbuffer_store_d16_xyz:
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140 ; GFX10-PACKED: ; %bb.0: ; %main_body
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141 ; GFX10-PACKED-NEXT: s_clause 0x2
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142 ; GFX10-PACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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143 ; GFX10-PACKED-NEXT: s_load_dword s8, s[4:5], 0x18
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144 ; GFX10-PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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145 ; GFX10-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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146 ; GFX10-PACKED-NEXT: s_and_b32 s4, s7, 0xffff
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147 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, s6
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148 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v1, s4
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149 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v2, s8
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150 ; GFX10-PACKED-NEXT: tbuffer_store_format_d16_xyz v[0:1], v2, s[0:3], 0 format:[BUF_FMT_10_11_11_SSCALED] idxen
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151 ; GFX10-PACKED-NEXT: s_endpgm
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152 ;
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153 ; GFX11-PACKED-LABEL: tbuffer_store_d16_xyz:
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154 ; GFX11-PACKED: ; %bb.0: ; %main_body
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155 ; GFX11-PACKED-NEXT: s_clause 0x2
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156 ; GFX11-PACKED-NEXT: s_load_b64 s[4:5], s[0:1], 0x10
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157 ; GFX11-PACKED-NEXT: s_load_b32 s6, s[0:1], 0x18
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158 ; GFX11-PACKED-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
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159 ; GFX11-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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160 ; GFX11-PACKED-NEXT: s_and_b32 s5, s5, 0xffff
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161 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, s4
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162 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v1, s5
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163 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v2, s6
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164 ; GFX11-PACKED-NEXT: tbuffer_store_d16_format_xyz v[0:1], v2, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
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165 ; GFX11-PACKED-NEXT: s_nop 0
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166 ; GFX11-PACKED-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
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167 ; GFX11-PACKED-NEXT: s_endpgm
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221
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168 main_body:
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169 %data_subvec = shufflevector <4 x half> %data, <4 x half> undef, <3 x i32> <i32 0, i32 1, i32 2>
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170 call void @llvm.amdgcn.struct.tbuffer.store.v3f16(<3 x half> %data_subvec, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 33, i32 0)
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171 ret void
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172 }
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173
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150
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174 define amdgpu_kernel void @tbuffer_store_d16_xyzw(<4 x i32> %rsrc, <4 x half> %data, i32 %vindex) {
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252
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175 ; PREGFX10-UNPACKED-LABEL: tbuffer_store_d16_xyzw:
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176 ; PREGFX10-UNPACKED: ; %bb.0: ; %main_body
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177 ; PREGFX10-UNPACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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178 ; PREGFX10-UNPACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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179 ; PREGFX10-UNPACKED-NEXT: s_load_dword s4, s[4:5], 0x18
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180 ; PREGFX10-UNPACKED-NEXT: s_waitcnt lgkmcnt(0)
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181 ; PREGFX10-UNPACKED-NEXT: s_lshr_b32 s5, s7, 16
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182 ; PREGFX10-UNPACKED-NEXT: s_and_b32 s7, s7, 0xffff
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183 ; PREGFX10-UNPACKED-NEXT: s_lshr_b32 s8, s6, 16
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184 ; PREGFX10-UNPACKED-NEXT: s_and_b32 s6, s6, 0xffff
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185 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, s6
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186 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v1, s8
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187 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v2, s7
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188 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v3, s5
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189 ; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v4, s4
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190 ; PREGFX10-UNPACKED-NEXT: tbuffer_store_format_d16_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen
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191 ; PREGFX10-UNPACKED-NEXT: s_endpgm
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192 ;
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193 ; PREGFX10-PACKED-LABEL: tbuffer_store_d16_xyzw:
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194 ; PREGFX10-PACKED: ; %bb.0: ; %main_body
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195 ; PREGFX10-PACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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196 ; PREGFX10-PACKED-NEXT: s_load_dword s8, s[4:5], 0x18
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197 ; PREGFX10-PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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198 ; PREGFX10-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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199 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v0, s6
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200 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v1, s7
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201 ; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v2, s8
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202 ; PREGFX10-PACKED-NEXT: tbuffer_store_format_d16_xyzw v[0:1], v2, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen
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203 ; PREGFX10-PACKED-NEXT: s_endpgm
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204 ;
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205 ; GFX10-PACKED-LABEL: tbuffer_store_d16_xyzw:
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206 ; GFX10-PACKED: ; %bb.0: ; %main_body
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207 ; GFX10-PACKED-NEXT: s_clause 0x2
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208 ; GFX10-PACKED-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
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209 ; GFX10-PACKED-NEXT: s_load_dword s8, s[4:5], 0x18
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210 ; GFX10-PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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211 ; GFX10-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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212 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, s6
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213 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v1, s7
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214 ; GFX10-PACKED-NEXT: v_mov_b32_e32 v2, s8
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215 ; GFX10-PACKED-NEXT: tbuffer_store_format_d16_xyzw v[0:1], v2, s[0:3], 0 format:[BUF_FMT_10_11_11_SSCALED] idxen
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216 ; GFX10-PACKED-NEXT: s_endpgm
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217 ;
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218 ; GFX11-PACKED-LABEL: tbuffer_store_d16_xyzw:
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219 ; GFX11-PACKED: ; %bb.0: ; %main_body
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220 ; GFX11-PACKED-NEXT: s_clause 0x2
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221 ; GFX11-PACKED-NEXT: s_load_b64 s[4:5], s[0:1], 0x10
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222 ; GFX11-PACKED-NEXT: s_load_b32 s6, s[0:1], 0x18
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223 ; GFX11-PACKED-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
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224 ; GFX11-PACKED-NEXT: s_waitcnt lgkmcnt(0)
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225 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, s4
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226 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v1, s5
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227 ; GFX11-PACKED-NEXT: v_mov_b32_e32 v2, s6
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228 ; GFX11-PACKED-NEXT: tbuffer_store_d16_format_xyzw v[0:1], v2, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen
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229 ; GFX11-PACKED-NEXT: s_nop 0
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230 ; GFX11-PACKED-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
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231 ; GFX11-PACKED-NEXT: s_endpgm
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150
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232 main_body:
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233 call void @llvm.amdgcn.struct.tbuffer.store.v4f16(<4 x half> %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 33, i32 0)
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234 ret void
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235 }
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236
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237 declare void @llvm.amdgcn.struct.tbuffer.store.f16(half, <4 x i32>, i32, i32, i32, i32, i32)
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238 declare void @llvm.amdgcn.struct.tbuffer.store.v2f16(<2 x half>, <4 x i32>, i32, i32, i32, i32, i32)
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221
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239 declare void @llvm.amdgcn.struct.tbuffer.store.v3f16(<3 x half>, <4 x i32>, i32, i32, i32, i32, i32)
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150
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240 declare void @llvm.amdgcn.struct.tbuffer.store.v4f16(<4 x half>, <4 x i32>, i32, i32, i32, i32, i32)
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