207
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1 ; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -verify-machineinstrs -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck --check-prefix=GCN %s
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150
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2
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3 ; GCN-LABEL: _amdgpu_hs_main:
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4
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5 define amdgpu_hs void @_amdgpu_hs_main() #0 {
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6 .entry:
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7 ret void
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8 }
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9
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10 ; GCN-LABEL: _amdgpu_ps_main:
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11 ; GCN: s_and_saveexec_b64
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12
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13 define amdgpu_ps void @_amdgpu_ps_main(i32 %arg) local_unnamed_addr #1 {
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14 .entry:
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15 %tmp = tail call float @llvm.amdgcn.interp.p2(float undef, float undef, i32 1, i32 0, i32 %arg) #2
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16 %tmp1 = tail call float @llvm.amdgcn.image.sample.2d.f32.f32(i32 1, float undef, float %tmp, <8 x i32> undef, <4 x i32> undef, i1 false, i32 0, i32 0)
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17 %tmp2 = fcmp olt float %tmp1, 5.000000e-01
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18 br i1 %tmp2, label %bb, label %l
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19
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20 bb: ; preds = %.entry
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21 unreachable
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22
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23 l: ; preds = %.entry
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24 ret void
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25 }
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26
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27 ; GCN-LABEL: _amdgpu_gs_main:
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28
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29 define amdgpu_gs void @_amdgpu_gs_main() #4 {
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30 .entry:
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31 ret void
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32 }
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33
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34 declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #2
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35 declare float @llvm.amdgcn.image.sample.2d.f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #3
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36
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37 attributes #0 = { "amdgpu-max-work-group-size"="128" "target-features"=",+wavefrontsize32" }
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38 attributes #1 = { "target-features"=",+wavefrontsize64" }
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39 attributes #2 = { nounwind readnone speculatable }
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40 attributes #3 = { nounwind readonly }
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41 attributes #4 = { "target-features"=",+wavefrontsize32" }
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