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annotate llvm/test/CodeGen/AMDGPU/r600.alu-limits.ll @ 266:00f31e85ec16 default tip

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Added tag current for changeset 31d058e83c98
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sat, 14 Oct 2023 10:13:55 +0900
parents 1f2b6ac9f198
children
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1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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1 ; RUN: opt -passes=loop-unroll -unroll-threshold=2000 -S < %s | llc -march=r600 -mcpu=cypress | FileCheck %s
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2 ; REQUIRES: asserts
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3
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4 ; CHECK: {{^}}alu_limits:
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5 ; CHECK: CF_END
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6
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7 %struct.foo = type {i32, i32, i32}
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8
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1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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9 define amdgpu_kernel void @alu_limits(ptr addrspace(1) %out, ptr addrspace(5) %in, i32 %offset) {
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10 entry:
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1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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11 %ptr = getelementptr inbounds %struct.foo, ptr addrspace(5) %in, i32 1, i32 2
1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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12 %x = load i32, ptr addrspace(5) %ptr, align 4
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13 br label %loop
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14 loop:
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15 %i = phi i32 [ 100, %entry ], [ %nexti, %loop ]
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16 %val = phi i32 [ 1, %entry ], [ %nextval, %loop ]
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17
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18 %nexti = sub i32 %i, 1
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19
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20 %y = xor i32 %x, %i
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21 %nextval = mul i32 %val, %y
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22
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23 %cond = icmp ne i32 %nexti, 0
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24 br i1 %cond, label %loop, label %end
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25 end:
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26 %out_val = add i32 %nextval, 4
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1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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27 store i32 %out_val, ptr addrspace(1) %out, align 4
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28 ret void
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29 }