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150
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1 // RUN: not llvm-tblgen -gen-subtarget -I %p/../../include %s 2>&1 | FileCheck %s -DFILE=%s
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2
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3 include "llvm/Target/Target.td"
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4
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5 def TestTarget : Target;
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6
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236
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7 // CHECK: [[FILE]]:[[@LINE+1]]:5: error: No schedule information for instruction 'TestInst' in SchedMachineModel 'TestSchedModel'
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150
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8 def TestInst : Instruction {
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9 let OutOperandList = (outs);
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10 let InOperandList = (ins);
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11 bits<8> Inst = 0b00101010;
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12 }
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13
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14 def TestSchedModel : SchedMachineModel {
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15 let CompleteModel = 1;
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16 }
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17
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18 def TestProcessor : ProcessorModel<"testprocessor", TestSchedModel, []>;
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