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150
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1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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2 ; RUN: opt -codegenprepare -S < %s | FileCheck %s
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3 ; RUN: opt -enable-debugify -codegenprepare -S < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
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4
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5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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6 target triple = "x86_64-apple-darwin10.0.0"
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7
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173
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8 define i64 @uaddo1_overflow_used(i64 %a, i64 %b) nounwind ssp {
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9 ; CHECK-LABEL: @uaddo1_overflow_used(
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150
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10 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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11 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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12 ; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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13 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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14 ; CHECK-NEXT: ret i64 [[Q]]
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15 ;
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16 %add = add i64 %b, %a
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17 %cmp = icmp ult i64 %add, %a
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18 %Q = select i1 %cmp, i64 %b, i64 42
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19 ret i64 %Q
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20 }
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21
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252
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22 define i64 @uaddo1_math_overflow_used(i64 %a, i64 %b, ptr %res) nounwind ssp {
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173
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23 ; CHECK-LABEL: @uaddo1_math_overflow_used(
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24 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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25 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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26 ; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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27 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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252
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28 ; CHECK-NEXT: store i64 [[MATH]], ptr [[RES:%.*]]
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173
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29 ; CHECK-NEXT: ret i64 [[Q]]
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30 ;
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31 %add = add i64 %b, %a
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32 %cmp = icmp ult i64 %add, %a
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33 %Q = select i1 %cmp, i64 %b, i64 42
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252
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34 store i64 %add, ptr %res
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173
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35 ret i64 %Q
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36 }
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37
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38 define i64 @uaddo2_overflow_used(i64 %a, i64 %b) nounwind ssp {
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39 ; CHECK-LABEL: @uaddo2_overflow_used(
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150
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40 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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41 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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42 ; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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43 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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44 ; CHECK-NEXT: ret i64 [[Q]]
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45 ;
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46 %add = add i64 %b, %a
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47 %cmp = icmp ult i64 %add, %b
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48 %Q = select i1 %cmp, i64 %b, i64 42
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49 ret i64 %Q
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50 }
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51
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252
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52 define i64 @uaddo2_math_overflow_used(i64 %a, i64 %b, ptr %res) nounwind ssp {
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173
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53 ; CHECK-LABEL: @uaddo2_math_overflow_used(
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54 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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55 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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56 ; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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57 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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252
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58 ; CHECK-NEXT: store i64 [[MATH]], ptr [[RES:%.*]]
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173
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59 ; CHECK-NEXT: ret i64 [[Q]]
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60 ;
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61 %add = add i64 %b, %a
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62 %cmp = icmp ult i64 %add, %b
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63 %Q = select i1 %cmp, i64 %b, i64 42
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252
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64 store i64 %add, ptr %res
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173
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65 ret i64 %Q
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66 }
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67
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68 define i64 @uaddo3_overflow_used(i64 %a, i64 %b) nounwind ssp {
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69 ; CHECK-LABEL: @uaddo3_overflow_used(
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150
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70 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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71 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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72 ; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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73 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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74 ; CHECK-NEXT: ret i64 [[Q]]
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75 ;
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76 %add = add i64 %b, %a
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77 %cmp = icmp ugt i64 %b, %add
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78 %Q = select i1 %cmp, i64 %b, i64 42
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79 ret i64 %Q
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80 }
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81
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252
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82 define i64 @uaddo3_math_overflow_used(i64 %a, i64 %b, ptr %res) nounwind ssp {
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173
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83 ; CHECK-LABEL: @uaddo3_math_overflow_used(
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84 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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85 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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86 ; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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87 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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252
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88 ; CHECK-NEXT: store i64 [[MATH]], ptr [[RES:%.*]]
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173
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89 ; CHECK-NEXT: ret i64 [[Q]]
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90 ;
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91 %add = add i64 %b, %a
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92 %cmp = icmp ugt i64 %b, %add
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93 %Q = select i1 %cmp, i64 %b, i64 42
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252
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94 store i64 %add, ptr %res
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173
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95 ret i64 %Q
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96 }
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97
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150
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98 ; TODO? CGP sinks the compare before we have a chance to form the overflow intrinsic.
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99
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100 define i64 @uaddo4(i64 %a, i64 %b, i1 %c) nounwind ssp {
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101 ; CHECK-LABEL: @uaddo4(
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102 ; CHECK-NEXT: entry:
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103 ; CHECK-NEXT: [[ADD:%.*]] = add i64 [[B:%.*]], [[A:%.*]]
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104 ; CHECK-NEXT: br i1 [[C:%.*]], label [[NEXT:%.*]], label [[EXIT:%.*]]
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105 ; CHECK: next:
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106 ; CHECK-NEXT: [[TMP0:%.*]] = icmp ugt i64 [[B]], [[ADD]]
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107 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[TMP0]], i64 [[B]], i64 42
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108 ; CHECK-NEXT: ret i64 [[Q]]
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109 ; CHECK: exit:
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110 ; CHECK-NEXT: ret i64 0
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111 ;
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112 entry:
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113 %add = add i64 %b, %a
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114 %cmp = icmp ugt i64 %b, %add
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115 br i1 %c, label %next, label %exit
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116
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117 next:
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118 %Q = select i1 %cmp, i64 %b, i64 42
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119 ret i64 %Q
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120
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121 exit:
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122 ret i64 0
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123 }
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124
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252
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125 define i64 @uaddo5(i64 %a, i64 %b, ptr %ptr, i1 %c) nounwind ssp {
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150
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126 ; CHECK-LABEL: @uaddo5(
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127 ; CHECK-NEXT: entry:
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128 ; CHECK-NEXT: [[ADD:%.*]] = add i64 [[B:%.*]], [[A:%.*]]
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252
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129 ; CHECK-NEXT: store i64 [[ADD]], ptr [[PTR:%.*]]
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150
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130 ; CHECK-NEXT: br i1 [[C:%.*]], label [[NEXT:%.*]], label [[EXIT:%.*]]
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131 ; CHECK: next:
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132 ; CHECK-NEXT: [[TMP0:%.*]] = icmp ugt i64 [[B]], [[ADD]]
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133 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[TMP0]], i64 [[B]], i64 42
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134 ; CHECK-NEXT: ret i64 [[Q]]
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135 ; CHECK: exit:
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136 ; CHECK-NEXT: ret i64 0
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137 ;
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138 entry:
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139 %add = add i64 %b, %a
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252
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140 store i64 %add, ptr %ptr
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150
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141 %cmp = icmp ugt i64 %b, %add
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142 br i1 %c, label %next, label %exit
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143
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144 next:
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145 %Q = select i1 %cmp, i64 %b, i64 42
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146 ret i64 %Q
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147
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148 exit:
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149 ret i64 0
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150 }
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151
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173
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152 ; Instcombine folds (a + b <u a) to (a ^ -1 <u b). Make sure we match this
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153 ; pattern as well.
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154 define i64 @uaddo6_xor(i64 %a, i64 %b) {
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155 ; CHECK-LABEL: @uaddo6_xor(
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156 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
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157 ; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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158 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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159 ; CHECK-NEXT: ret i64 [[Q]]
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160 ;
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161 %x = xor i64 %a, -1
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162 %cmp = icmp ult i64 %x, %b
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163 %Q = select i1 %cmp, i64 %b, i64 42
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164 ret i64 %Q
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165 }
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166
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167 define i64 @uaddo6_xor_commuted(i64 %a, i64 %b) {
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168 ; CHECK-LABEL: @uaddo6_xor_commuted(
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169 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
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170 ; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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171 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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172 ; CHECK-NEXT: ret i64 [[Q]]
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173 ;
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174 %x = xor i64 %a, -1
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175 %cmp = icmp ult i64 %x, %b
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176 %Q = select i1 %cmp, i64 %b, i64 42
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177 ret i64 %Q
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178 }
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179
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180 declare void @use(i64)
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181
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182 define i64 @uaddo6_xor_multi_use(i64 %a, i64 %b) {
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183 ; CHECK-LABEL: @uaddo6_xor_multi_use(
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184 ; CHECK-NEXT: [[X:%.*]] = xor i64 -1, [[A:%.*]]
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185 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[X]], [[B:%.*]]
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186 ; CHECK-NEXT: [[Q:%.*]] = select i1 [[CMP]], i64 [[B]], i64 42
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187 ; CHECK-NEXT: call void @use(i64 [[X]])
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188 ; CHECK-NEXT: ret i64 [[Q]]
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189 ;
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190 %x = xor i64 -1, %a
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191 %cmp = icmp ult i64 %x, %b
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192 %Q = select i1 %cmp, i64 %b, i64 42
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193 call void @use(i64 %x)
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194 ret i64 %Q
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195 }
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196
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197 ; Make sure we do not use the XOR binary operator as insert point, as it may
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198 ; come before the second operand of the overflow intrinsic.
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252
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199 define i1 @uaddo6_xor_op_after_XOR(i32 %a, ptr %b.ptr) {
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173
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200 ; CHECK-LABEL: @uaddo6_xor_op_after_XOR(
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252
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201 ; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR:%.*]], align 8
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173
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202 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 [[B]])
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203 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
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204 ; CHECK-NEXT: [[OV:%.*]] = xor i1 [[OV1]], true
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205 ; CHECK-NEXT: ret i1 [[OV]]
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206 ;
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207 %x = xor i32 %a, -1
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252
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208 %b = load i32, ptr %b.ptr, align 8
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173
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209 %cmp14 = icmp ugt i32 %b, %x
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210 %ov = xor i1 %cmp14, true
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211 ret i1 %ov
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212 }
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213
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150
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214 ; When adding 1, the general pattern for add-overflow may be different due to icmp canonicalization.
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215 ; PR31754: https://bugs.llvm.org/show_bug.cgi?id=31754
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216
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252
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217 define i1 @uaddo_i64_increment(i64 %x, ptr %p) {
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150
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218 ; CHECK-LABEL: @uaddo_i64_increment(
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219 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[X:%.*]], i64 1)
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220 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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221 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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252
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222 ; CHECK-NEXT: store i64 [[MATH]], ptr [[P:%.*]]
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150
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223 ; CHECK-NEXT: ret i1 [[OV1]]
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224 ;
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225 %a = add i64 %x, 1
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226 %ov = icmp eq i64 %a, 0
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252
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227 store i64 %a, ptr %p
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150
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228 ret i1 %ov
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229 }
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230
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252
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231 define i1 @uaddo_i8_increment_noncanonical_1(i8 %x, ptr %p) {
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150
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232 ; CHECK-LABEL: @uaddo_i8_increment_noncanonical_1(
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233 ; CHECK-NEXT: [[TMP1:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 1, i8 [[X:%.*]])
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234 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i8, i1 } [[TMP1]], 0
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235 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i8, i1 } [[TMP1]], 1
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252
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236 ; CHECK-NEXT: store i8 [[MATH]], ptr [[P:%.*]]
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150
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237 ; CHECK-NEXT: ret i1 [[OV1]]
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238 ;
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239 %a = add i8 1, %x ; commute
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240 %ov = icmp eq i8 %a, 0
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252
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241 store i8 %a, ptr %p
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150
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242 ret i1 %ov
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243 }
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244
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252
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245 define i1 @uaddo_i32_increment_noncanonical_2(i32 %x, ptr %p) {
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150
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246 ; CHECK-LABEL: @uaddo_i32_increment_noncanonical_2(
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247 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[X:%.*]], i32 1)
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248 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0
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249 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
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252
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250 ; CHECK-NEXT: store i32 [[MATH]], ptr [[P:%.*]]
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150
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251 ; CHECK-NEXT: ret i1 [[OV1]]
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252 ;
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253 %a = add i32 %x, 1
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254 %ov = icmp eq i32 0, %a ; commute
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252
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255 store i32 %a, ptr %p
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150
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256 ret i1 %ov
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257 }
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258
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252
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259 define i1 @uaddo_i16_increment_noncanonical_3(i16 %x, ptr %p) {
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150
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260 ; CHECK-LABEL: @uaddo_i16_increment_noncanonical_3(
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261 ; CHECK-NEXT: [[TMP1:%.*]] = call { i16, i1 } @llvm.uadd.with.overflow.i16(i16 1, i16 [[X:%.*]])
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262 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i16, i1 } [[TMP1]], 0
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263 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i16, i1 } [[TMP1]], 1
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252
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264 ; CHECK-NEXT: store i16 [[MATH]], ptr [[P:%.*]]
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150
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265 ; CHECK-NEXT: ret i1 [[OV1]]
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266 ;
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267 %a = add i16 1, %x ; commute
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268 %ov = icmp eq i16 0, %a ; commute
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252
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269 store i16 %a, ptr %p
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150
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270 ret i1 %ov
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271 }
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272
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273 ; The overflow check may be against the input rather than the sum.
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274
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252
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275 define i1 @uaddo_i64_increment_alt(i64 %x, ptr %p) {
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150
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276 ; CHECK-LABEL: @uaddo_i64_increment_alt(
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277 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[X:%.*]], i64 1)
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278 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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279 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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252
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280 ; CHECK-NEXT: store i64 [[MATH]], ptr [[P:%.*]]
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150
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281 ; CHECK-NEXT: ret i1 [[OV1]]
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282 ;
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283 %a = add i64 %x, 1
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252
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284 store i64 %a, ptr %p
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150
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285 %ov = icmp eq i64 %x, -1
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286 ret i1 %ov
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287 }
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288
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289 ; Make sure insertion is done correctly based on dominance.
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290
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252
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291 define i1 @uaddo_i64_increment_alt_dom(i64 %x, ptr %p) {
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150
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292 ; CHECK-LABEL: @uaddo_i64_increment_alt_dom(
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293 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[X:%.*]], i64 1)
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294 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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295 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
|
|
252
|
296 ; CHECK-NEXT: store i64 [[MATH]], ptr [[P:%.*]]
|
|
150
|
297 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
298 ;
|
|
|
299 %ov = icmp eq i64 %x, -1
|
|
|
300 %a = add i64 %x, 1
|
|
252
|
301 store i64 %a, ptr %p
|
|
150
|
302 ret i1 %ov
|
|
|
303 }
|
|
|
304
|
|
|
305 ; The overflow check may be against the input rather than the sum.
|
|
|
306
|
|
252
|
307 define i1 @uaddo_i64_decrement_alt(i64 %x, ptr %p) {
|
|
150
|
308 ; CHECK-LABEL: @uaddo_i64_decrement_alt(
|
|
|
309 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[X:%.*]], i64 -1)
|
|
|
310 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
|
|
|
311 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
|
|
252
|
312 ; CHECK-NEXT: store i64 [[MATH]], ptr [[P:%.*]]
|
|
150
|
313 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
314 ;
|
|
|
315 %a = add i64 %x, -1
|
|
252
|
316 store i64 %a, ptr %p
|
|
150
|
317 %ov = icmp ne i64 %x, 0
|
|
|
318 ret i1 %ov
|
|
|
319 }
|
|
|
320
|
|
|
321 ; Make sure insertion is done correctly based on dominance.
|
|
|
322
|
|
252
|
323 define i1 @uaddo_i64_decrement_alt_dom(i64 %x, ptr %p) {
|
|
150
|
324 ; CHECK-LABEL: @uaddo_i64_decrement_alt_dom(
|
|
|
325 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[X:%.*]], i64 -1)
|
|
|
326 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
|
|
|
327 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
|
|
252
|
328 ; CHECK-NEXT: store i64 [[MATH]], ptr [[P:%.*]]
|
|
150
|
329 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
330 ;
|
|
|
331 %ov = icmp ne i64 %x, 0
|
|
|
332 %a = add i64 %x, -1
|
|
252
|
333 store i64 %a, ptr %p
|
|
150
|
334 ret i1 %ov
|
|
|
335 }
|
|
|
336
|
|
|
337 ; No transform for illegal types.
|
|
|
338
|
|
252
|
339 define i1 @uaddo_i42_increment_illegal_type(i42 %x, ptr %p) {
|
|
150
|
340 ; CHECK-LABEL: @uaddo_i42_increment_illegal_type(
|
|
|
341 ; CHECK-NEXT: [[A:%.*]] = add i42 [[X:%.*]], 1
|
|
|
342 ; CHECK-NEXT: [[OV:%.*]] = icmp eq i42 [[A]], 0
|
|
252
|
343 ; CHECK-NEXT: store i42 [[A]], ptr [[P:%.*]]
|
|
150
|
344 ; CHECK-NEXT: ret i1 [[OV]]
|
|
|
345 ;
|
|
|
346 %a = add i42 %x, 1
|
|
|
347 %ov = icmp eq i42 %a, 0
|
|
252
|
348 store i42 %a, ptr %p
|
|
150
|
349 ret i1 %ov
|
|
|
350 }
|
|
|
351
|
|
252
|
352 define i1 @usubo_ult_i64_overflow_used(i64 %x, i64 %y, ptr %p) {
|
|
173
|
353 ; CHECK-LABEL: @usubo_ult_i64_overflow_used(
|
|
|
354 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 [[X:%.*]], i64 [[Y:%.*]])
|
|
|
355 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
|
|
|
356 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
|
|
|
357 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
358 ;
|
|
|
359 %s = sub i64 %x, %y
|
|
|
360 %ov = icmp ult i64 %x, %y
|
|
|
361 ret i1 %ov
|
|
|
362 }
|
|
|
363
|
|
252
|
364 define i1 @usubo_ult_i64_math_overflow_used(i64 %x, i64 %y, ptr %p) {
|
|
173
|
365 ; CHECK-LABEL: @usubo_ult_i64_math_overflow_used(
|
|
150
|
366 ; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 [[X:%.*]], i64 [[Y:%.*]])
|
|
|
367 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
|
|
|
368 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
|
|
252
|
369 ; CHECK-NEXT: store i64 [[MATH]], ptr [[P:%.*]]
|
|
150
|
370 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
371 ;
|
|
|
372 %s = sub i64 %x, %y
|
|
252
|
373 store i64 %s, ptr %p
|
|
150
|
374 %ov = icmp ult i64 %x, %y
|
|
|
375 ret i1 %ov
|
|
|
376 }
|
|
|
377
|
|
|
378 ; Verify insertion point for single-BB. Toggle predicate.
|
|
|
379
|
|
252
|
380 define i1 @usubo_ugt_i32(i32 %x, i32 %y, ptr %p) {
|
|
150
|
381 ; CHECK-LABEL: @usubo_ugt_i32(
|
|
|
382 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
|
|
|
383 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0
|
|
|
384 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
|
|
252
|
385 ; CHECK-NEXT: store i32 [[MATH]], ptr [[P:%.*]]
|
|
150
|
386 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
387 ;
|
|
|
388 %ov = icmp ugt i32 %y, %x
|
|
|
389 %s = sub i32 %x, %y
|
|
252
|
390 store i32 %s, ptr %p
|
|
150
|
391 ret i1 %ov
|
|
|
392 }
|
|
|
393
|
|
|
394 ; Constant operand should match.
|
|
|
395
|
|
252
|
396 define i1 @usubo_ugt_constant_op0_i8(i8 %x, ptr %p) {
|
|
150
|
397 ; CHECK-LABEL: @usubo_ugt_constant_op0_i8(
|
|
|
398 ; CHECK-NEXT: [[TMP1:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 42, i8 [[X:%.*]])
|
|
|
399 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i8, i1 } [[TMP1]], 0
|
|
|
400 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i8, i1 } [[TMP1]], 1
|
|
252
|
401 ; CHECK-NEXT: store i8 [[MATH]], ptr [[P:%.*]]
|
|
150
|
402 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
403 ;
|
|
|
404 %s = sub i8 42, %x
|
|
|
405 %ov = icmp ugt i8 %x, 42
|
|
252
|
406 store i8 %s, ptr %p
|
|
150
|
407 ret i1 %ov
|
|
|
408 }
|
|
|
409
|
|
|
410 ; Compare with constant operand 0 is canonicalized by commuting, but verify match for non-canonical form.
|
|
|
411
|
|
252
|
412 define i1 @usubo_ult_constant_op0_i16(i16 %x, ptr %p) {
|
|
150
|
413 ; CHECK-LABEL: @usubo_ult_constant_op0_i16(
|
|
|
414 ; CHECK-NEXT: [[TMP1:%.*]] = call { i16, i1 } @llvm.usub.with.overflow.i16(i16 43, i16 [[X:%.*]])
|
|
|
415 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i16, i1 } [[TMP1]], 0
|
|
|
416 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i16, i1 } [[TMP1]], 1
|
|
252
|
417 ; CHECK-NEXT: store i16 [[MATH]], ptr [[P:%.*]]
|
|
150
|
418 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
419 ;
|
|
|
420 %s = sub i16 43, %x
|
|
|
421 %ov = icmp ult i16 43, %x
|
|
252
|
422 store i16 %s, ptr %p
|
|
150
|
423 ret i1 %ov
|
|
|
424 }
|
|
|
425
|
|
|
426 ; Subtract with constant operand 1 is canonicalized to add.
|
|
|
427
|
|
252
|
428 define i1 @usubo_ult_constant_op1_i16(i16 %x, ptr %p) {
|
|
150
|
429 ; CHECK-LABEL: @usubo_ult_constant_op1_i16(
|
|
|
430 ; CHECK-NEXT: [[TMP1:%.*]] = call { i16, i1 } @llvm.usub.with.overflow.i16(i16 [[X:%.*]], i16 44)
|
|
|
431 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i16, i1 } [[TMP1]], 0
|
|
|
432 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i16, i1 } [[TMP1]], 1
|
|
252
|
433 ; CHECK-NEXT: store i16 [[MATH]], ptr [[P:%.*]]
|
|
150
|
434 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
435 ;
|
|
|
436 %s = add i16 %x, -44
|
|
|
437 %ov = icmp ult i16 %x, 44
|
|
252
|
438 store i16 %s, ptr %p
|
|
150
|
439 ret i1 %ov
|
|
|
440 }
|
|
|
441
|
|
252
|
442 define i1 @usubo_ugt_constant_op1_i8(i8 %x, ptr %p) {
|
|
150
|
443 ; CHECK-LABEL: @usubo_ugt_constant_op1_i8(
|
|
|
444 ; CHECK-NEXT: [[TMP1:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[X:%.*]], i8 45)
|
|
|
445 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i8, i1 } [[TMP1]], 0
|
|
|
446 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i8, i1 } [[TMP1]], 1
|
|
252
|
447 ; CHECK-NEXT: store i8 [[MATH]], ptr [[P:%.*]]
|
|
150
|
448 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
449 ;
|
|
|
450 %ov = icmp ugt i8 45, %x
|
|
|
451 %s = add i8 %x, -45
|
|
252
|
452 store i8 %s, ptr %p
|
|
150
|
453 ret i1 %ov
|
|
|
454 }
|
|
|
455
|
|
|
456 ; Special-case: subtract 1 changes the compare predicate and constant.
|
|
|
457
|
|
252
|
458 define i1 @usubo_eq_constant1_op1_i32(i32 %x, ptr %p) {
|
|
150
|
459 ; CHECK-LABEL: @usubo_eq_constant1_op1_i32(
|
|
|
460 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[X:%.*]], i32 1)
|
|
|
461 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0
|
|
|
462 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
|
|
252
|
463 ; CHECK-NEXT: store i32 [[MATH]], ptr [[P:%.*]]
|
|
150
|
464 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
465 ;
|
|
|
466 %s = add i32 %x, -1
|
|
|
467 %ov = icmp eq i32 %x, 0
|
|
252
|
468 store i32 %s, ptr %p
|
|
150
|
469 ret i1 %ov
|
|
|
470 }
|
|
|
471
|
|
|
472 ; Special-case: subtract from 0 (negate) changes the compare predicate.
|
|
|
473
|
|
252
|
474 define i1 @usubo_ne_constant0_op1_i32(i32 %x, ptr %p) {
|
|
150
|
475 ; CHECK-LABEL: @usubo_ne_constant0_op1_i32(
|
|
|
476 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 [[X:%.*]])
|
|
|
477 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0
|
|
|
478 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
|
|
252
|
479 ; CHECK-NEXT: store i32 [[MATH]], ptr [[P:%.*]]
|
|
150
|
480 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
481 ;
|
|
|
482 %s = sub i32 0, %x
|
|
|
483 %ov = icmp ne i32 %x, 0
|
|
252
|
484 store i32 %s, ptr %p
|
|
150
|
485 ret i1 %ov
|
|
|
486 }
|
|
|
487
|
|
|
488 ; This used to verify insertion point for multi-BB, but now we just bail out.
|
|
|
489
|
|
|
490 declare void @call(i1)
|
|
|
491
|
|
252
|
492 define i1 @usubo_ult_sub_dominates_i64(i64 %x, i64 %y, ptr %p, i1 %cond) {
|
|
150
|
493 ; CHECK-LABEL: @usubo_ult_sub_dominates_i64(
|
|
|
494 ; CHECK-NEXT: entry:
|
|
|
495 ; CHECK-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
|
|
|
496 ; CHECK: t:
|
|
|
497 ; CHECK-NEXT: [[S:%.*]] = sub i64 [[X:%.*]], [[Y:%.*]]
|
|
252
|
498 ; CHECK-NEXT: store i64 [[S]], ptr [[P:%.*]]
|
|
150
|
499 ; CHECK-NEXT: br i1 [[COND]], label [[END:%.*]], label [[F]]
|
|
|
500 ; CHECK: f:
|
|
|
501 ; CHECK-NEXT: ret i1 [[COND]]
|
|
|
502 ; CHECK: end:
|
|
|
503 ; CHECK-NEXT: [[OV:%.*]] = icmp ult i64 [[X]], [[Y]]
|
|
|
504 ; CHECK-NEXT: ret i1 [[OV]]
|
|
|
505 ;
|
|
|
506 entry:
|
|
|
507 br i1 %cond, label %t, label %f
|
|
|
508
|
|
|
509 t:
|
|
|
510 %s = sub i64 %x, %y
|
|
252
|
511 store i64 %s, ptr %p
|
|
150
|
512 br i1 %cond, label %end, label %f
|
|
|
513
|
|
|
514 f:
|
|
|
515 ret i1 %cond
|
|
|
516
|
|
|
517 end:
|
|
|
518 %ov = icmp ult i64 %x, %y
|
|
|
519 ret i1 %ov
|
|
|
520 }
|
|
|
521
|
|
252
|
522 define i1 @usubo_ult_cmp_dominates_i64(i64 %x, i64 %y, ptr %p, i1 %cond) {
|
|
150
|
523 ; CHECK-LABEL: @usubo_ult_cmp_dominates_i64(
|
|
|
524 ; CHECK-NEXT: entry:
|
|
|
525 ; CHECK-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
|
|
|
526 ; CHECK: t:
|
|
|
527 ; CHECK-NEXT: [[OV:%.*]] = icmp ult i64 [[X:%.*]], [[Y:%.*]]
|
|
|
528 ; CHECK-NEXT: call void @call(i1 [[OV]])
|
|
|
529 ; CHECK-NEXT: br i1 [[OV]], label [[END:%.*]], label [[F]]
|
|
|
530 ; CHECK: f:
|
|
|
531 ; CHECK-NEXT: ret i1 [[COND]]
|
|
|
532 ; CHECK: end:
|
|
|
533 ; CHECK-NEXT: [[TMP0:%.*]] = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 [[X]], i64 [[Y]])
|
|
|
534 ; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP0]], 0
|
|
|
535 ; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP0]], 1
|
|
252
|
536 ; CHECK-NEXT: store i64 [[MATH]], ptr [[P:%.*]]
|
|
150
|
537 ; CHECK-NEXT: ret i1 [[OV1]]
|
|
|
538 ;
|
|
|
539 entry:
|
|
|
540 br i1 %cond, label %t, label %f
|
|
|
541
|
|
|
542 t:
|
|
|
543 %ov = icmp ult i64 %x, %y
|
|
|
544 call void @call(i1 %ov)
|
|
|
545 br i1 %ov, label %end, label %f
|
|
|
546
|
|
|
547 f:
|
|
|
548 ret i1 %cond
|
|
|
549
|
|
|
550 end:
|
|
|
551 %s = sub i64 %x, %y
|
|
252
|
552 store i64 %s, ptr %p
|
|
150
|
553 ret i1 %ov
|
|
|
554 }
|
|
|
555
|
|
|
556 ; Verify that crazy/non-canonical code does not crash.
|
|
|
557
|
|
|
558 define void @bar() {
|
|
|
559 ; CHECK-LABEL: @bar(
|
|
|
560 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 1, -1
|
|
|
561 ; CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
|
|
|
562 ; CHECK-NEXT: unreachable
|
|
|
563 ;
|
|
|
564 %cmp = icmp eq i64 1, -1
|
|
|
565 %frombool = zext i1 %cmp to i8
|
|
|
566 unreachable
|
|
|
567 }
|
|
|
568
|
|
|
569 define void @foo() {
|
|
|
570 ; CHECK-LABEL: @foo(
|
|
|
571 ; CHECK-NEXT: [[SUB:%.*]] = add nsw i64 1, 1
|
|
|
572 ; CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[SUB]] to i32
|
|
|
573 ; CHECK-NEXT: unreachable
|
|
|
574 ;
|
|
|
575 %sub = add nsw i64 1, 1
|
|
|
576 %conv = trunc i64 %sub to i32
|
|
|
577 unreachable
|
|
|
578 }
|
|
|
579
|
|
|
580 ; Similarly for usubo.
|
|
|
581
|
|
|
582 define i1 @bar2() {
|
|
|
583 ; CHECK-LABEL: @bar2(
|
|
|
584 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 1, 0
|
|
|
585 ; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
586 ;
|
|
|
587 %cmp = icmp eq i64 1, 0
|
|
|
588 ret i1 %cmp
|
|
|
589 }
|
|
|
590
|
|
252
|
591 define i64 @foo2(ptr %p) {
|
|
150
|
592 ; CHECK-LABEL: @foo2(
|
|
|
593 ; CHECK-NEXT: [[SUB:%.*]] = add nsw i64 1, -1
|
|
|
594 ; CHECK-NEXT: ret i64 [[SUB]]
|
|
|
595 ;
|
|
|
596 %sub = add nsw i64 1, -1
|
|
|
597 ret i64 %sub
|
|
|
598 }
|
|
|
599
|
|
|
600 ; Avoid hoisting a math op into a dominating block which would
|
|
|
601 ; increase the critical path.
|
|
|
602
|
|
252
|
603 define void @PR41129(ptr %p64) {
|
|
150
|
604 ; CHECK-LABEL: @PR41129(
|
|
|
605 ; CHECK-NEXT: entry:
|
|
252
|
606 ; CHECK-NEXT: [[KEY:%.*]] = load i64, ptr [[P64:%.*]], align 8
|
|
150
|
607 ; CHECK-NEXT: [[COND17:%.*]] = icmp eq i64 [[KEY]], 0
|
|
|
608 ; CHECK-NEXT: br i1 [[COND17]], label [[TRUE:%.*]], label [[FALSE:%.*]]
|
|
|
609 ; CHECK: false:
|
|
|
610 ; CHECK-NEXT: [[ANDVAL:%.*]] = and i64 [[KEY]], 7
|
|
252
|
611 ; CHECK-NEXT: store i64 [[ANDVAL]], ptr [[P64]]
|
|
150
|
612 ; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
|
613 ; CHECK: true:
|
|
|
614 ; CHECK-NEXT: [[SVALUE:%.*]] = add i64 [[KEY]], -1
|
|
252
|
615 ; CHECK-NEXT: store i64 [[SVALUE]], ptr [[P64]]
|
|
150
|
616 ; CHECK-NEXT: br label [[EXIT]]
|
|
|
617 ; CHECK: exit:
|
|
|
618 ; CHECK-NEXT: ret void
|
|
|
619 ;
|
|
|
620 entry:
|
|
252
|
621 %key = load i64, ptr %p64, align 8
|
|
150
|
622 %cond17 = icmp eq i64 %key, 0
|
|
|
623 br i1 %cond17, label %true, label %false
|
|
|
624
|
|
|
625 false:
|
|
|
626 %andval = and i64 %key, 7
|
|
252
|
627 store i64 %andval, ptr %p64
|
|
150
|
628 br label %exit
|
|
|
629
|
|
|
630 true:
|
|
|
631 %svalue = add i64 %key, -1
|
|
252
|
632 store i64 %svalue, ptr %p64
|
|
150
|
633 br label %exit
|
|
|
634
|
|
|
635 exit:
|
|
|
636 ret void
|
|
|
637 }
|
|
|
638
|
|
|
639 ; Check that every instruction inserted by -codegenprepare has a debug location.
|
|
|
640 ; DEBUG: CheckModuleDebugify: PASS
|
|
|
641
|
