Mercurial > hg > CbC > CbC_llvm

comparison llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll @ 173:0572611fdcc8 llvm10 llvm12

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
reorgnization done
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 25 May 2020 11:55:54 +0900
parents 1d019706d866
children c4bab56944e8
comparison
equal deleted inserted replaced
172:9fbae9c8bf63 173:0572611fdcc8
176 176
177 if_false: 177 if_false:
178 %res = lshr <2 x i64> %lhs, %mask 178 %res = lshr <2 x i64> %lhs, %mask
179 ret <2 x i64> %res 179 ret <2 x i64> %res
180 } 180 }
181
182 define void @funnel_splatvar(i32* nocapture %arr, i32 %rot) {
183 ; CHECK-SSE2-LABEL: @funnel_splatvar(
184 ; CHECK-SSE2-NEXT: entry:
185 ; CHECK-SSE2-NEXT: [[BROADCAST_SPLATINSERT15:%.*]] = insertelement <8 x i32> undef, i32 [[ROT:%.*]], i32 0
186 ; CHECK-SSE2-NEXT: br label [[VECTOR_BODY:%.*]]
187 ; CHECK-SSE2: vector.body:
188 ; CHECK-SSE2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
189 ; CHECK-SSE2-NEXT: [[T0:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 [[INDEX]]
190 ; CHECK-SSE2-NEXT: [[T1:%.*]] = bitcast i32* [[T0]] to <8 x i32>*
191 ; CHECK-SSE2-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i32>, <8 x i32>* [[T1]], align 4
192 ; CHECK-SSE2-NEXT: [[TMP0:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT15]], <8 x i32> undef, <8 x i32> zeroinitializer
193 ; CHECK-SSE2-NEXT: [[T2:%.*]] = call <8 x i32> @llvm.fshl.v8i32(<8 x i32> [[WIDE_LOAD]], <8 x i32> [[WIDE_LOAD]], <8 x i32> [[TMP0]])
194 ; CHECK-SSE2-NEXT: store <8 x i32> [[T2]], <8 x i32>* [[T1]], align 4
195 ; CHECK-SSE2-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 8
196 ; CHECK-SSE2-NEXT: [[T3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 65536
197 ; CHECK-SSE2-NEXT: br i1 [[T3]], label [[FOR_COND_CLEANUP:%.*]], label [[VECTOR_BODY]]
198 ; CHECK-SSE2: for.cond.cleanup:
199 ; CHECK-SSE2-NEXT: ret void
200 ;
201 ; CHECK-XOP-LABEL: @funnel_splatvar(
202 ; CHECK-XOP-NEXT: entry:
203 ; CHECK-XOP-NEXT: [[BROADCAST_SPLATINSERT15:%.*]] = insertelement <8 x i32> undef, i32 [[ROT:%.*]], i32 0
204 ; CHECK-XOP-NEXT: [[BROADCAST_SPLAT16:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT15]], <8 x i32> undef, <8 x i32> zeroinitializer
205 ; CHECK-XOP-NEXT: br label [[VECTOR_BODY:%.*]]
206 ; CHECK-XOP: vector.body:
207 ; CHECK-XOP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
208 ; CHECK-XOP-NEXT: [[T0:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 [[INDEX]]
209 ; CHECK-XOP-NEXT: [[T1:%.*]] = bitcast i32* [[T0]] to <8 x i32>*
210 ; CHECK-XOP-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i32>, <8 x i32>* [[T1]], align 4
211 ; CHECK-XOP-NEXT: [[T2:%.*]] = call <8 x i32> @llvm.fshl.v8i32(<8 x i32> [[WIDE_LOAD]], <8 x i32> [[WIDE_LOAD]], <8 x i32> [[BROADCAST_SPLAT16]])
212 ; CHECK-XOP-NEXT: store <8 x i32> [[T2]], <8 x i32>* [[T1]], align 4
213 ; CHECK-XOP-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 8
214 ; CHECK-XOP-NEXT: [[T3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 65536
215 ; CHECK-XOP-NEXT: br i1 [[T3]], label [[FOR_COND_CLEANUP:%.*]], label [[VECTOR_BODY]]
216 ; CHECK-XOP: for.cond.cleanup:
217 ; CHECK-XOP-NEXT: ret void
218 ;
219 ; CHECK-AVX-LABEL: @funnel_splatvar(
220 ; CHECK-AVX-NEXT: entry:
221 ; CHECK-AVX-NEXT: [[BROADCAST_SPLATINSERT15:%.*]] = insertelement <8 x i32> undef, i32 [[ROT:%.*]], i32 0
222 ; CHECK-AVX-NEXT: [[BROADCAST_SPLAT16:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT15]], <8 x i32> undef, <8 x i32> zeroinitializer
223 ; CHECK-AVX-NEXT: br label [[VECTOR_BODY:%.*]]
224 ; CHECK-AVX: vector.body:
225 ; CHECK-AVX-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
226 ; CHECK-AVX-NEXT: [[T0:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 [[INDEX]]
227 ; CHECK-AVX-NEXT: [[T1:%.*]] = bitcast i32* [[T0]] to <8 x i32>*
228 ; CHECK-AVX-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i32>, <8 x i32>* [[T1]], align 4
229 ; CHECK-AVX-NEXT: [[T2:%.*]] = call <8 x i32> @llvm.fshl.v8i32(<8 x i32> [[WIDE_LOAD]], <8 x i32> [[WIDE_LOAD]], <8 x i32> [[BROADCAST_SPLAT16]])
230 ; CHECK-AVX-NEXT: store <8 x i32> [[T2]], <8 x i32>* [[T1]], align 4
231 ; CHECK-AVX-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 8
232 ; CHECK-AVX-NEXT: [[T3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 65536
233 ; CHECK-AVX-NEXT: br i1 [[T3]], label [[FOR_COND_CLEANUP:%.*]], label [[VECTOR_BODY]]
234 ; CHECK-AVX: for.cond.cleanup:
235 ; CHECK-AVX-NEXT: ret void
236 ;
237 entry:
238 %broadcast.splatinsert15 = insertelement <8 x i32> undef, i32 %rot, i32 0
239 %broadcast.splat16 = shufflevector <8 x i32> %broadcast.splatinsert15, <8 x i32> undef, <8 x i32> zeroinitializer
240 br label %vector.body
241
242 vector.body:
243 %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
244 %t0 = getelementptr inbounds i32, i32* %arr, i64 %index
245 %t1 = bitcast i32* %t0 to <8 x i32>*
246 %wide.load = load <8 x i32>, <8 x i32>* %t1, align 4
247 %t2 = call <8 x i32> @llvm.fshl.v8i32(<8 x i32> %wide.load, <8 x i32> %wide.load, <8 x i32> %broadcast.splat16)
248 store <8 x i32> %t2, <8 x i32>* %t1, align 4
249 %index.next = add i64 %index, 8
250 %t3 = icmp eq i64 %index.next, 65536
251 br i1 %t3, label %for.cond.cleanup, label %vector.body
252
253 for.cond.cleanup:
254 ret void
255 }
256
257 declare <8 x i32> @llvm.fshl.v8i32(<8 x i32>, <8 x i32>, <8 x i32>)